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    Phase change memory devices and memory systems including the same
    1.
    发明授权
    Phase change memory devices and memory systems including the same 有权
    相变存储器件和包括其的存储器系统

    公开(公告)号：US08320171B2

    公开(公告)日：2012-11-27

    申请号：US12662180

    申请日：2010-04-05

    Applicant: Mu-Hui Park

    Inventor： Mu-Hui Park

    IPC: G11C11/00

    CPC classification number: G11C13/0038 ,  G11C7/04 ,  G11C13/0004 ,  G11C13/004 ,  G11C2013/0045 ,  G11C2013/0054

    Abstract: A phase change memory device includes a memory cell array having a plurality of phase change memory cells, a read bias generating circuit, a clamping circuit and a clamping control signal generating circuit (CCSGC). The read bias generating circuit provides a sensing node with a read bias for reading a resistance level of a selected phase change memory cell. The clamping circuit controls an amount of clamping current flowing into a bit line connected with the selected phase change memory cell. The CCSGC provides the clamping control signal to the clamping circuit and adjusts a level of the clamping control signal.

    Abstract translation: 相变存储器件包括具有多个相变存储单元，读偏置产生电路，钳位电路和钳位控制信号发生电路（CCSGC）的存储单元阵列。 读偏置产生电路为感测节点提供读偏置，用于读取所选相变存储单元的电阻电平。 钳位电路控制流入与选择的相变存储单元连接的位线的钳位电流量。 CCSGC向钳位电路提供钳位控制信号，并调整钳位控制信号的电平。

    Phase change memory device generating program current and method thereof
    2.
    发明授权
    Phase change memory device generating program current and method thereof 有权
    相变存储器件产生程序电流及其方法

    公开(公告)号：US08259511B2

    公开(公告)日：2012-09-04

    申请号：US13064672

    申请日：2011-04-07

    Applicant: Beak-Hyung Cho ,  Woo-Yeong Cho ,  Mu-Hui Park

    Inventor： Beak-Hyung Cho ,  Woo-Yeong Cho ,  Mu-Hui Park

    IPC: G11C7/10

    CPC classification number: G11C13/0069 ,  G11C13/0004 ,  G11C2013/0078 ,  G11C2013/0092 ,  G11C2213/72

    Abstract: A phase change memory device may include a memory cell array, a write driver, and/or a control unit. The memory cell array may include a plurality of memory cells. The write driver may be configured to provide a program current to the memory cell array for setting a state of a phase change material to program a selected memory cell. The write driver may be configured to provide the program current such that the program current has a plurality of steps. The control unit may be configured to receive step information for adjusting a magnitude and a width of each step of the program current during a test operation and provide the step information to the write driver during a normal operation.

    Abstract translation: 相变存储器件可以包括存储单元阵列，写入驱动器和/或控制单元。 存储单元阵列可以包括多个存储单元。 写入驱动器可以被配置为向存储器单元阵列提供程序电流，用于设置相变材料的状态以对选定的存储单元进行编程。 写驱动器可以被配置为提供程序电流，使得程序电流具有多个步骤。 控制单元可以被配置为在测试操作期间接收用于调整程序电流的每个步骤的幅度和宽度的步骤信息，并且在正常操作期间将该步骤信息提供给写入驱动器。

    Phase change memory device generating program current and method thereof
    4.
    发明申请
    Phase change memory device generating program current and method thereof 有权
    相变存储器件产生程序电流及其方法

    公开(公告)号：US20080062753A1

    公开(公告)日：2008-03-13

    申请号：US11898045

    申请日：2007-09-07

    Applicant: Beak-Hyung Cho ,  Woo-Yeong Cho ,  Mu-Hui Park

    Inventor： Beak-Hyung Cho ,  Woo-Yeong Cho ,  Mu-Hui Park

    IPC: G11C11/00

    CPC classification number: G11C13/0069 ,  G11C13/0004 ,  G11C2013/0078 ,  G11C2013/0092 ,  G11C2213/72

    Abstract: A phase change memory device may include a memory cell array, a write driver, and/or a control unit. The memory cell array may include a plurality of memory cells. The write driver may be configured to provide a program current to the memory cell array for setting a state of a phase change material to program a selected memory cell. The write driver may be configured to provide the program current such that the program current has a plurality of steps. The control unit may be configured to receive step information for adjusting a magnitude and a width of each step of the program current during a test operation and provide the step information to the write driver during a normal operation.

    Abstract translation: 相变存储器件可以包括存储单元阵列，写入驱动器和/或控制单元。 存储单元阵列可以包括多个存储单元。 写入驱动器可以被配置为向存储器单元阵列提供程序电流，用于设置相变材料的状态以对选定的存储单元进行编程。 写驱动器可以被配置为提供程序电流，使得程序电流具有多个步骤。 控制单元可以被配置为在测试操作期间接收用于调整程序电流的每个步骤的幅度和宽度的步骤信息，并且在正常操作期间将该步骤信息提供给写入驱动器。

    Phase change memory device generating program current and method thereof
    5.
    发明申请
    Phase change memory device generating program current and method thereof 有权
    相变存储器件产生程序电流及其方法

    公开(公告)号：US20100110781A1

    公开(公告)日：2010-05-06

    申请号：US12654338

    申请日：2009-12-17

    Applicant: Beak-Hyung Cho ,  Woo-Yeong Cho ,  Mu-Hui Park

    Inventor： Beak-Hyung Cho ,  Woo-Yeong Cho ,  Mu-Hui Park

    IPC: G11C11/00 ,  G11C7/10 ,  G11C17/16

    CPC classification number: G11C13/0069 ,  G11C13/0004 ,  G11C2013/0078 ,  G11C2013/0092 ,  G11C2213/72

    Abstract: A phase change memory device may include a memory cell array, a write driver, and/or a control unit. The memory cell array may include a plurality of memory cells. The write driver may be configured to provide a program current to the memory cell array for setting a state of a phase change material to program a selected memory cell. The write driver may be configured to provide the program current such that the program current has a plurality of steps. The control unit may be configured to receive step information for adjusting a magnitude and a width of each step of the program current during a test operation and provide the step information to the write driver during a normal operation.

    Abstract translation: 相变存储器件可以包括存储单元阵列，写入驱动器和/或控制单元。 存储单元阵列可以包括多个存储单元。 写入驱动器可以被配置为向存储器单元阵列提供程序电流，用于设置相变材料的状态以对选定的存储单元进行编程。 写驱动器可以被配置为提供程序电流，使得程序电流具有多个步骤。 控制单元可以被配置为在测试操作期间接收用于调整程序电流的每个步骤的幅度和宽度的步骤信息，并且在正常操作期间将该步骤信息提供给写入驱动器。

    Bias voltage generator and method generating bias voltage for semiconductor memory device
    6.
    发明授权
    Bias voltage generator and method generating bias voltage for semiconductor memory device 有权
    用于半导体存储器件的偏置电压发生器和产生偏置电压的方法

    公开(公告)号：US07548467B2

    公开(公告)日：2009-06-16

    申请号：US11955562

    申请日：2007-12-13

    Applicant: Hye-Jin Kim ,  Kwang-Jin Lee ,  Woo-Yeong Cho ,  Mu-Hui Park

    Inventor： Hye-Jin Kim ,  Kwang-Jin Lee ,  Woo-Yeong Cho ,  Mu-Hui Park

    IPC: G11C5/14

    CPC classification number: G11C13/004 ,  G11C5/147 ,  G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0038 ,  G11C16/30 ,  G11C2013/0054 ,  G11C2213/72

    Abstract: There are provided a bias voltage generator, a semiconductor memory device having the bias voltage generator, and a method for generating the bias voltage. The bias voltage generator which generates the bias voltage to control a sensing current supplied to a memory cell for sensing data is characterized in that the bias voltage is output in response to an input voltage being applied, so that a slope of the bias voltage to the input voltage is different in at least two sections divided corresponding to a level of the input voltage.

    Abstract translation: 提供了偏置电压发生器，具有偏置电压发生器的半导体存储器件以及用于产生偏置电压的方法。 产生用于控制提供给存储单元的感测电流以感测数据的偏置电压的偏置电压发生器的特征在于，响应于所施加的输入电压而输出偏置电压，使得偏置电压的斜率 至少两个部分的输入电压不同，对应于输入电压的电平。

    Phase change memory device generating program current and mehtod thereof
    7.
    发明申请
    Phase change memory device generating program current and mehtod thereof 有权
    相变存储器件产生程序电流和电流

    公开(公告)号：US20110188303A1

    公开(公告)日：2011-08-04

    申请号：US13064672

    申请日：2011-04-07

    Applicant: Beak-Hyung Cho ,  Woo-Yeong Cho ,  Mu-Hui Park

    Inventor： Beak-Hyung Cho ,  Woo-Yeong Cho ,  Mu-Hui Park

    IPC: G11C11/00

    CPC classification number: G11C13/0069 ,  G11C13/0004 ,  G11C2013/0078 ,  G11C2013/0092 ,  G11C2213/72

    Abstract: A phase change memory device may include a memory cell array, a write driver, and/or a control unit. The memory cell array may include a plurality of memory cells. The write driver may be configured to provide a program current to the memory cell array for setting a state of a phase change material to program a selected memory cell. The write driver may be configured to provide the program current such that the program current has a plurality of steps. The control unit may be configured to receive step information for adjusting a magnitude and a width of each step of the program current during a test operation and provide the step information to the write driver during a normal operation.

    Abstract translation: 相变存储器件可以包括存储单元阵列，写入驱动器和/或控制单元。 存储单元阵列可以包括多个存储单元。 写入驱动器可以被配置为向存储器单元阵列提供程序电流，用于设置相变材料的状态以对选定的存储单元进行编程。 写驱动器可以被配置为提供程序电流，使得程序电流具有多个步骤。 控制单元可以被配置为在测试操作期间接收用于调整程序电流的每个步骤的幅度和宽度的步骤信息，并且在正常操作期间将该步骤信息提供给写入驱动器。

    Phase change memory device generating program current and method thereof
    8.
    发明授权
    Phase change memory device generating program current and method thereof 有权
    相变存储器件产生程序电流及其方法

    公开(公告)号：US07936612B2

    公开(公告)日：2011-05-03

    申请号：US12654338

    申请日：2009-12-17

    Applicant: Beak-Hyung Cho ,  Woo-Yeong Cho ,  Mu-Hui Park

    Inventor： Beak-Hyung Cho ,  Woo-Yeong Cho ,  Mu-Hui Park

    IPC: G11C7/10

    CPC classification number: G11C13/0069 ,  G11C13/0004 ,  G11C2013/0078 ,  G11C2013/0092 ,  G11C2213/72

    Abstract: A phase change memory device may include a memory cell array, a write driver, and/or a control unit. The memory cell array may include a plurality of memory cells. The write driver may be configured to provide a program current to the memory cell array for setting a state of a phase change material to program a selected memory cell. The write driver may be configured to provide the program current such that the program current has a plurality of steps. The control unit may be configured to receive step information for adjusting a magnitude and a width of each step of the program current during a test operation and provide the step information to the write driver during a normal operation.

    Abstract translation: 相变存储器件可以包括存储单元阵列，写入驱动器和/或控制单元。 存储单元阵列可以包括多个存储单元。 写入驱动器可以被配置为向存储器单元阵列提供程序电流，用于设置相变材料的状态以对选定的存储单元进行编程。 写驱动器可以被配置为提供程序电流，使得程序电流具有多个步骤。 控制单元可以被配置为在测试操作期间接收用于调整程序电流的每个步骤的幅度和宽度的步骤信息，并且在正常操作期间将该步骤信息提供给写入驱动器。

    Phase change memory devices and memory systems including the same
    9.
    发明申请
    Phase change memory devices and memory systems including the same 有权
    相变存储器件和包括其的存储器系统

    公开(公告)号：US20100271868A1

    公开(公告)日：2010-10-28

    申请号：US12662180

    申请日：2010-04-05

    Applicant: Mu-Hui Park

    Inventor： Mu-Hui Park

    IPC: G11C11/00 ,  G11C7/00

    CPC classification number: G11C13/0038 ,  G11C7/04 ,  G11C13/0004 ,  G11C13/004 ,  G11C2013/0045 ,  G11C2013/0054

    Abstract: A phase change memory device includes a memory cell array having a plurality of phase change memory cells, a read bias generating circuit, a clamping circuit and a clamping control signal generating circuit (CCSGC). The read bias generating circuit provides a sensing node with a read bias for reading a resistance level of a selected phase change memory cell. The clamping circuit controls an amount of clamping current flowing into a bit line connected with the selected phase change memory cell. The CCSGC provides the clamping control signal to the clamping circuit and adjusts a level of the clamping control signal.

    Abstract translation: 相变存储器件包括具有多个相变存储单元，读偏置产生电路，钳位电路和钳位控制信号发生电路（CCSGC）的存储单元阵列。 读偏置产生电路为感测节点提供读偏置，用于读取所选相变存储单元的电阻电平。 钳位电路控制流入与选择的相变存储单元连接的位线的钳位电流量。 CCSGC向钳位电路提供钳位控制信号，并调整钳位控制信号的电平。

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