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公开(公告)号:US11476056B2
公开(公告)日:2022-10-18
申请号:US17065879
申请日:2020-10-08
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Hiroshi Nakagawa , Tomoyuki Ashimine , Yasuhiro Murase
IPC: H01L29/76 , H01L27/108 , H01G4/33 , H01G4/018
Abstract: A capacitor that includes a substrate, a dielectric portion, and a conductor layer. The dielectric portion includes a thick film portion and a thin film portion. The thick film portion has a thickness larger than the average thickness of the dielectric portion in a direction perpendicular to the first main surface. The thin film portion has a thickness smaller than the average thickness of the dielectric portion in the direction perpendicular to the first main surface. The thick film portion has a larger relative permittivity than the thin film portion.
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公开(公告)号:US20200381181A1
公开(公告)日:2020-12-03
申请号:US16998058
申请日:2020-08-20
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yasuhiro Murase , Tomoyuki Ashimine , Hiroshi Nakagawa
Abstract: A capacitor that includes a substrate having a main surface with at least one of a recess or a projection, a dielectric film extending along the at least one of the recess or the projection and having an equivalent oxide thickness of 600 nm or more, and a conductor film covering at least part of the dielectric film.
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公开(公告)号:US11303201B2
公开(公告)日:2022-04-12
申请号:US17023710
申请日:2020-09-17
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Tomoyuki Ashimine , Hiroshi Nakagawa , Yasuhiro Murase
Abstract: A CR snubber element includes a first resistance part, a first capacitance part, a second resistance part, and a second capacitance part. The first capacitance part is connected in series to the first resistance part. The second resistance part is connected in series to the first resistance part and the first capacitance part and the second capacitance part is connected in parallel to the second resistance part. The CR snubber element is configured such that the second resistance part is disconnected when the first capacitance part is short-circuited.
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公开(公告)号:US11145711B2
公开(公告)日:2021-10-12
申请号:US16546556
申请日:2019-08-21
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Tomoyuki Ashimine , Hiroshi Nakagawa , Yasuhiro Murase
IPC: H01L49/02 , H01G4/33 , H01L21/02 , H01L21/285 , H01L21/306 , H01L21/3065 , H01L21/321 , H01L21/784 , H01L21/3213
Abstract: A capacitor that includes a substrate having a principal surface; a dielectric film on the principal surface of the substrate; and an electrode layer on the dielectric film. The substrate has a recess structure portion with at least one recess portion in a second region outside a first region where the electrode layer overlaps the dielectric layer when viewed in a plan view from a normal direction of the principal surface of the substrate, and the dielectric film is on the recess structure portion.
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公开(公告)号:US20200273796A1
公开(公告)日:2020-08-27
申请号:US15931816
申请日:2020-05-14
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yasuhiro Murase , Tomoyuki Ashimine , Hiroshi Nakagawa
IPC: H01L23/522 , H01L49/02 , H01L27/02
Abstract: A semiconductor device that includes a semiconductor substrate having a first main surface and a second main surface, a first electrode opposing the first main surface of the semiconductor substrate, a dielectric layer between the semiconductor substrate and the first electrode, a first resistance control layer on the first electrode, a wiring part on the first resistance control layer, and a second electrode opposing the second main surface of the semiconductor substrate. The first resistance control layer includes a first region that has a first electrical resistivity and that electrically connects the first electrode and the wiring part, and a second region that is aligned with the first region and has a second electrical resistivity higher than the first electrical resistivity of the first region.
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公开(公告)号:US12249600B2
公开(公告)日:2025-03-11
申请号:US17945462
申请日:2022-09-15
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yohei Yamaguchi , Yasuhiro Murase , Stéphane Bouvier
IPC: H01L27/01
Abstract: RC-network components that include a substrate and capacitor having a thin-film top electrode portion at a surface on one side of the substrate. The low ohmic semiconductor substrate is doped to contribute 5% or less to the resistance of the RC-network component. The resistance provided in series with the capacitor is controlled by providing a contact plate, spaced from the thin-film top electrode portion by an insulating layer, and a set of one or more bridging contacts passing through openings in the insulating layer. The bridging contacts electrically interconnect the thin-film top electrode portion and the contact plate. Different resistance values can be set by appropriate selection of the number of bridging contacts. The openings are elongated thereby reducing temperature concentration at their periphery. Correspondingly, the bridging contacts have an elongated cross-sectional shape.
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公开(公告)号:US11830909B2
公开(公告)日:2023-11-28
申请号:US17651993
申请日:2022-02-22
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Tomoyuki Ashimine , Yuji Irie , Yasuhiro Murase
IPC: H01L29/92 , H01L21/265 , H01L29/06 , H01L29/66 , H01L29/94 , H01L23/31 , H02M7/5387
CPC classification number: H01L29/0607 , H01L29/66181 , H01L29/94 , H01L29/945 , H01L21/26533 , H01L23/3171 , H02M7/5387
Abstract: A semiconductor device is provided that includes a semiconductor substrate having a first main surface and a second main surface facing each other; a dielectric layer laminated on the first main surface of the semiconductor substrate; a first electrode layer laminated on the dielectric layer; and a protective layer covering at least an outer peripheral end of the dielectric layer and an outer peripheral end of the first electrode layer. Moreover, the protective layer is provided to expose an outer peripheral end on the first main surface of the semiconductor substrate. The semiconductor substrate includes a high-resistance region positioned at least directly under an outer peripheral end of the protective layer.
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公开(公告)号:US11239159B2
公开(公告)日:2022-02-01
申请号:US15931816
申请日:2020-05-14
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yasuhiro Murase , Tomoyuki Ashimine , Hiroshi Nakagawa
IPC: H01L23/522 , H01L27/02 , H01L29/94 , H01L27/06 , H01L49/02
Abstract: A semiconductor device that includes a semiconductor substrate having a first main surface and a second main surface, a first electrode opposing the first main surface of the semiconductor substrate, a dielectric layer between the semiconductor substrate and the first electrode, a first resistance control layer on the first electrode, a wiring part on the first resistance control layer, and a second electrode opposing the second main surface of the semiconductor substrate. The first resistance control layer includes a first region that has a first electrical resistivity and that electrically connects the first electrode and the wiring part, and a second region that is aligned with the first region and has a second electrical resistivity higher than the first electrical resistivity of the first region.
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公开(公告)号:US20200286880A1
公开(公告)日:2020-09-10
申请号:US16883497
申请日:2020-05-26
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Tomoyuki Ashimine , Hiroshi Nakagawa , Yasuhiro Murase
IPC: H01L27/01 , H01L49/02 , H02M3/158 , H02M7/5387
Abstract: A semiconductor apparatus that includes a semiconductor substrate having a first main surface and a second main surface, a first electrode opposing the first main surface of the semiconductor substrate, a dielectric layer between the semiconductor substrate and the first electrode, a second electrode opposing the second main surface of the semiconductor substrate, and a resistance control layer between the semiconductor substrate and the second electrode. The resistance control layer includes a first region having a first electrical resistivity and electrically connecting the semiconductor substrate and the second electrode, and a second region having a second electrical resistivity higher than the first electrical resistivity of the first region and adjacent to the first region.
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公开(公告)号:US20200176614A1
公开(公告)日:2020-06-04
申请号:US16781459
申请日:2020-02-04
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Tomoyuki Ashimine , Hiroshi Nakagawa , Yasuhiro Murase
Abstract: A capacitor that includes an insulating base material having a first main surface and a second main surface facing each other, the insulating base material defining first and second trenches extending from the first main surface into the base material such that first trench and the second trench overlap each other; a first conductor in the first trench; a first external electrode on the first main surface of the base material and connected to the first conductor; a second conductor in the second trench; and a second external electrode on the second main surface of the base material and connected to the second conductor.
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