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    Semiconductor device and memory card using same
    7.
    发明授权
    Semiconductor device and memory card using same 有权
    半导体器件和存储卡使用相同

    公开(公告)号：US07268611B2

    公开(公告)日：2007-09-11

    申请号：US10524087

    申请日：2003-08-08

    申请人： Mutsumi Kikuchi ,  Noboru Akiyama ,  Hiroyuki Shoji ,  Fumio Murabayashi ,  Akihiko Kanouda ,  Takashi Sase ,  Koji Tateno

    发明人： Mutsumi Kikuchi ,  Noboru Akiyama ,  Hiroyuki Shoji ,  Fumio Murabayashi ,  Akihiko Kanouda ,  Takashi Sase ,  Koji Tateno

    IPC分类号： G05F1/10

    CPC分类号： G11C5/147 ,  H01L27/0688 ,  H01L27/08 ,  H02M3/156 ,  H02M2001/007

    摘要： A semiconductor device capable of achieving downsizing without reducing the power supply efficiency and capable of reducing switching noises and a memory card using the same are disclosed. The device comprises a plurality of stages of voltage booster circuits for potentially raising a power supply voltage up to a final output voltage, a voltage control unit for controlling an output voltage at a nearby location of the final stage, and one or more internal elements to which the final output voltage is supplied. A primary voltage booster circuit at the first stage includes an inductance element, a switching element, a diode and a driver circuit. At a metal core part of the inductance element, a metal wiring line is used, which was formed by use of a fabrication process of semiconductor integrated circuits, while employing for its core part an inter-wiring layer dielectric film that was formed using the fabrication process. In addition, the switching element and the diode are arranged so that portions thereof are disposed beneath the inductance element.

    摘要翻译： 公开了能够实现小型化而不降低电源效率并且能够降低开关噪声的半导体器件和使用其的存储卡。 该装置包括用于潜在地提高最终输出电压的电源电压的多级升压电路，用于控制最后级的附近位置处的输出电压的电压控制单元和一个或多个内部元件 其提供最终输出电压。 第一级的初级升压电路包括电感元件，开关元件，二极管和驱动器电路。 在电感元件的金属芯部分，使用通过使用半导体集成电路的制造工艺形成的金属布线，同时使用其核心部分使用该制造形成的布线层电介质膜 处理。 此外，开关元件和二极管被布置成使得其部分设置在电感元件下方。

    Soft start circuit for switching power supply
    8.
    发明授权
    Soft start circuit for switching power supply 失效
    用于开关电源的软启动电路

    公开(公告)号：US06377480B1

    公开(公告)日：2002-04-23

    申请号：US09928442

    申请日：2001-08-14

    申请人： Takashi Sase ,  Fumio Murabayashi ,  Mutsumi Kikuchi

    发明人： Takashi Sase ,  Fumio Murabayashi ,  Mutsumi Kikuchi

    IPC分类号： H02M112

    CPC分类号： H02M1/36 ,  Y10S323/901

    摘要： In a switching power source comprising a triangular wave generating circuit and an error amplifier and a PWM comparator, in normal time PWM pulses being obtained by comparing an output amplitude of triangular wave of the triangular wave generating circuit with an output voltage of the error amplifier as a reference voltage using the PWM comparator, the soft-start circuit of the switching power source comprises a soft-start reference value setting part composed of a group of resistance networks and a group of switches using the same structure as an upper-and-lower limit setting part, composed of networks and switches, for setting an upper and a lower limits of the amplitude of triangular wave of the triangular generating circuit; and a counting circuit for counting cycles of the triangular wave of the triangular wave generating circuit to obtain a plurality of arbitrary soft-start timings in order to switch the group of switches.

    摘要翻译： 在包括三角波发生电路和误差放大器和PWM比较器的开关电源中，在正常时间PWM脉冲是通过将三角波产生电路的三角波的输出振幅与误差放大器的输出电压进行比较而获得的， 使用PWM比较器的参考电压，开关电源的软启动电路包括由一组电阻网络组成的软启动基准值设定部分和使用与上下相同结构的一组开关 限制设定部分，由网络和开关组成，用于设定三角形发生电路三角波振幅的上限和下限; 以及计数电路，用于对三角波产生电路的三角波的周期进行计数，以获得多个任意的软启动定时，以切换开关组。

    Semiconductior device and memory card using same
    9.
    发明申请
    Semiconductior device and memory card using same 有权
    半导体器件和存储卡使用相同

    公开(公告)号：US20050237039A1

    公开(公告)日：2005-10-27

    申请号：US10524087

    申请日：2003-08-08

    申请人： Mutsumi Kikuchi ,  Noboru Akiyama ,  Hiroyuki Shoji ,  Fumio Murabayashi ,  Akihiko Kanouda ,  Takashi Sase ,  Koji Tateno

    发明人： Mutsumi Kikuchi ,  Noboru Akiyama ,  Hiroyuki Shoji ,  Fumio Murabayashi ,  Akihiko Kanouda ,  Takashi Sase ,  Koji Tateno

    IPC分类号： G05F1/40 ,  G11C5/14 ,  H01L27/06 ,  H01L27/08 ,  H02M3/156

    CPC分类号： G11C5/147 ,  H01L27/0688 ,  H01L27/08 ,  H02M3/156 ,  H02M2001/007

    摘要： A semiconductor device capable of achieving downsizing without reducing the power supply efficiency and capable of reducing switching noises and a memory card using the same are disclosed. The device comprises a plurality of stages of voltage booster circuits for potentially raising a power supply voltage up to a final output voltage, a voltage control unit for controlling an output voltage at a nearby location of the final stage, and one or more internal elements to which the final output voltage is supplied. A primary voltage booster circuit at the first stage includes an inductance element, a switching element, a diode and a driver circuit. At a metal core part of the inductance element, a metal wiring line is used, which was formed by use of a fabrication process of semiconductor integrated circuits, while employing for its core part an inter-wiring layer dielectric film that was formed using the fabrication process. In addition, the switching element and the diode are arranged so that portions thereof are disposed beneath the inductance element.

    摘要翻译： 公开了能够实现小型化而不降低电源效率并且能够降低开关噪声的半导体器件和使用其的存储卡。 该装置包括用于潜在地提高最终输出电压的电源电压的多级升压电路，用于控制最后级的附近位置处的输出电压的电压控制单元和一个或多个内部元件 其提供最终输出电压。 第一级的初级升压电路包括电感元件，开关元件，二极管和驱动器电路。 在电感元件的金属芯部分，使用通过使用半导体集成电路的制造工艺形成的金属布线，同时使用其核心部分使用该制造形成的布线层电介质膜 处理。 此外，开关元件和二极管被布置成使得其部分设置在电感元件下方。

    Waveform shaping device
    10.
    发明授权
    Waveform shaping device 失效
    波形整形装置

    公开(公告)号：US06437621B2

    公开(公告)日：2002-08-20

    申请号：US09816100

    申请日：2001-03-26

    申请人： Kazuo Kato ,  Takashi Sase ,  Takashi Hotta ,  Fumio Murabayashi

    发明人： Kazuo Kato ,  Takashi Sase ,  Takashi Hotta ,  Fumio Murabayashi

    IPC分类号： H03K317

    CPC分类号： C08K5/5419 ,  C08G77/442 ,  C08G77/50 ,  C08L27/12 ,  C08L69/00

    摘要： A waveform shaping circuit is provided so that the duty factor of clock pulses can be set to 50% with high accuracy even if the clock pulses are of a low voltage and a high frequency. An inverter which receives the clock pulses through an alternating current coupling capacitor is provided with a non-linear limiter element for limiting an amplitude of an output symmetrically on positive and negative sides thereof. A first current-limiting impedance and a second current-limiting impedance are connected between a power supply side terminal of the inverter and a power supply bus and between a grounding side terminal of the inverter and a grounding bus, respectively.

    摘要翻译： 提供波形整形电路，使得即使时钟脉冲是低电压和高频率，时钟脉冲的占空因数也可以高精度地设置为50％。 通过交流耦合电容器接收时钟脉冲的逆变器设置有非线性限制器元件，用于在其正侧和负侧对称地限制输出的幅度。 逆变器的电源侧端子与电源总线之间以及逆变器的接地侧端子与接地母线之间分别连接有第一限流阻抗和第二限流阻抗。