公开(公告)号：US12119962B2

公开(公告)日：2024-10-15

申请号：US17630375

申请日：2019-08-05

申请人： Nippon Telegraph and Telephone Corporation

发明人： Naoki Terao ,  Munehiko Nagatani ,  Hideyuki Nosaka

IPC分类号： H04L25/02 ,  G01R27/32 ,  G01R31/28 ,  G01R31/58 ,  G06F3/05 ,  H03M1/12

CPC分类号： H04L25/0272 ,  G01R27/32 ,  G01R31/2813 ,  G01R31/58 ,  G06F3/05 ,  H03M1/126

摘要： A sampling circuit includes: a first transmission line that transmits an input signal; a second transmission line that transmits a clock signal; and a plurality of sample-hold circuits that are connected to the first and second transmission lines at a constant line distance, wherein the first transmission line transmits the input signal at a first propagation time for each of the line distances, and the second transmission line transmits the clock signal at a second propagation time that is a sum of a preset sampling interval and the first propagation time for each of the line distances.

公开(公告)号：US12095182B2

公开(公告)日：2024-09-17

申请号：US17912218

申请日：2020-04-20

申请人： Nippon Telegraph and Telephone Corporation

发明人： Go Itami ,  Hiroshi Hamada ,  Hideyuki Nosaka

IPC分类号： H01Q13/08 ,  H01Q9/04

CPC分类号： H01Q9/045 ,  H01Q13/08

摘要： Stub conductors are disposed so as to surround an outer periphery of a patch conductor and be spaced from the patch conductor with a gap positioned between the stub conductors and the patch conductor.

公开(公告)号：US12050484B2

公开(公告)日：2024-07-30

申请号：US17051637

申请日：2019-04-17

申请人： Nippon Telegraph and Telephone Corporation

发明人： Kenji Tanaka ,  Naoki Miura ,  Shinsuke Nakano ,  Hideyuki Nosaka

IPC分类号： G06F1/10 ,  G06F1/06 ,  H03F1/22 ,  H03F3/08 ,  H03K3/42

CPC分类号： G06F1/10 ,  G06F1/06 ,  H03F3/08 ,  H03F1/223 ,  H03F3/082 ,  H03K3/42

摘要： A clock generation circuit includes a mode-locked laser that generates an optical pulse, a photodiode that photoelectrically converts the optical pulse generated by the mode-locked laser, and a filter that attenuates at least one of a DC component and a harmonic component of the mode-locked laser included in an electric signal output from the photodiode.

公开(公告)号：US12025642B2

公开(公告)日：2024-07-02

申请号：US17786867

申请日：2019-12-20

申请人： Nippon Telegraph and Telephone Corporation

发明人： Teruo Jo ,  Hiroshi Hamada ,  Hideyuki Nosaka

IPC分类号： G01V3/10 ,  G01N21/3581 ,  G01R27/26

CPC分类号： G01R27/2617 ,  G01N21/3581

摘要： A permittivity measuring method includes measuring a set of phases at sampling frequencies of at least three points in each of a first-half portion and a second-half portion of a phase characteristic of electromagnetic waves that passed through a measurement target, if the mode of the phase changes of both sets of phases belongs to a phase group in which change of the at least three points in the first half and change of at least three points in the second half are both monotonic change, maximal values, or minimal values, calculating the permittivity using the phase slope of the phases in the first-half portion and the phases in the second-half portion, and if the mode of the phase changes does not belong to the phase group, calculating the permittivity by fitting the phases of either the first half or the second half to a quadratic function.

公开(公告)号：US20240120883A1

公开(公告)日：2024-04-11

申请号：US18546172

申请日：2021-02-18

申请人： Nippon Telegraph and Telephone Corporation

发明人： Teruo Jo ,  Munehiko Nagatani ,  Hideyuki Nosaka

IPC分类号： H03B5/24

CPC分类号： H03B5/24

摘要： A voltage-controlled oscillator includes a first unit cell, a second unit cell that is connected in parallel to the first unit cell via transmission lines, a compensation unit cell that is connected in parallel with the first unit cell and the second unit cell between the first unit cell and the second unit cell, and an input termination resistor that is connected to a power supply voltage terminal of each of the first unit cell, the second unit cell, and the compensation unit cell. Symmetrical voltages are supplied to the first unit cell and the second unit cell, and the compensation unit cell compensates for a gain by the first unit cell or the second unit cell.

公开(公告)号：US20230336185A1

公开(公告)日：2023-10-19

申请号：US17768168

申请日：2019-10-23

申请人： Nippon Telegraph and Telephone Corporation

发明人： Munehiko Nagatani ,  Teruo Jo ,  Hiroshi Yamazaki ,  Hideyuki Nosaka

IPC分类号： H03M1/12 ,  H03K17/693

CPC分类号： H03M1/1255 ,  H03M1/1295 ,  H03K17/693

摘要： An analog demultiplexer circuit includes a clock distribution circuit that outputs clock signals (CK1P and CK1N) and clock signals (CK2P and CK2N) complementary thereto, a track-and-hold circuit that holds analog input signals (VINP and VINN) in synchronization with the clock signals (CK1P and CK1N), and a track-and-hold circuit that holds the analog input signals (VINP and VINN) in synchronization with the clock signals (CK2P and CK2N).

公开(公告)号：US20230299724A1

公开(公告)日：2023-09-21

申请号：US18005928

申请日：2020-07-21

申请人： Nippon Telegraph and Telephone Corporation

发明人： Teruo Jo ,  Munehiko Nagatani ,  Hideyuki Nosaka

IPC分类号： H03F1/42 ,  H03F3/45

CPC分类号： H03F1/42 ,  H03F3/45179 ,  H03F2200/36

摘要： An amplifier circuit comprises a variable degeneration circuit connected to emitter terminals of transistors, and a variable negative capacitance circuit connected to differential output signal terminals. The variable degeneration circuit includes a variable capacitor and a resistor. The variable negative capacitance circuit, which is a variable current source, includes a transistor, a capacitor, and a variable current source. The variable negative capacitance circuit includes transistors, a capacitor, and variable current sources.

公开(公告)号：US20230288735A1

公开(公告)日：2023-09-14

申请号：US18006124

申请日：2020-07-21

申请人： Nippon Telegraph and Telephone Corporation

发明人： Teruo Jo ,  Munehiko Nagatani ,  Hideyuki Nosaka

IPC分类号： G02F1/01 ,  H02H9/04

CPC分类号： G02F1/0121 ,  H02H9/044

摘要： An embodiment includes an output circuit with transistors and a withstand voltage protection circuit. The withstand voltage protection circuit includes resistors connected between an output signal terminal on the positive phase side and an output signal terminal on the negative phase side. A switch includes an NMOS transistor having a gate terminal connected to the connection point of the resistors, a drain terminal connected to the bias voltage, and a source terminal connected to the base terminal of the transistor.

公开(公告)号：US20230246616A1

公开(公告)日：2023-08-03

申请号：US18002919

申请日：2020-06-26

申请人： Nippon Telegraph and Telephone Corporation

发明人： Teruo Jo ,  Munehiko Nagatani ,  Hideyuki Nosaka

IPC分类号： H03F3/60 ,  H03H11/34

CPC分类号： H03F3/605 ,  H03H11/34

摘要： An embodiment is a multiplexer including a first distributed amplifier with an impedance matched to 50Ω, the first distributed amplifier configured to receive a first signal and output a first amplified signal, a second distributed amplifier with an impedance matched to 50Ω, the second distributed amplifier configured to receive a second signal and output a second amplified signal, and a passive multiplexer configured to multiplex the first amplified signal and the second amplified signal, and output a multiplexed signal to a signal output terminal, the passive multiplexer including a first resistor having a first end to receive the first amplified signal, a second resistor having a first end to receive the second amplified signal, and a third resistor having a first end connected to second ends of the first and second resistors and a second end connected to the signal output terminal.

公开(公告)号：US20230130741A1

公开(公告)日：2023-04-27

申请号：US17912218

申请日：2020-04-20

申请人： Nippon Telegraph and Telephone Corporation

发明人： Go Itami ,  Hiroshi Hamada ,  Hideyuki Nosaka

IPC分类号： H01Q9/04 ,  H01Q13/08

摘要： Stub conductors are disposed so as to surround an outer periphery of a patch conductor and be spaced from the patch conductor with a gap positioned between the stub conductors and the patch conductor.