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公开(公告)号：US20200011911A1
公开(公告)日：2020-01-09
申请号：US16493184
申请日：2017-07-21
发明人： Yingtai LI , Gangyi HU , Luncai LIU , Fan LIU , Jian'an WANG , Xin LEI , Xiaozong HUANG , Guoqiang WANG , Jin ZHAO , Jianzhuang LI
IPC分类号： G01R23/02
摘要： A high-precision frequency measuring system and method. The system includes: an analog-to-digital conversion module for receiving an analog intermediate frequency signal to convert the analog intermediate frequency signal into a digital intermediate frequency signal; a frequency mixing module for generating two orthogonal local carriers to convert the digital intermediate frequency signal to a digital baseband signal; an extraction filter module for performing low-pass filtering and extraction of the digital baseband signal, so as to reduce a data rate; a Fourier transform module for obtaining a frequency domain signal; a frequency measurement module for obtaining a first frequency measurement value; a scanning module for obtaining a scanned second frequency measurement value; and a selector for selecting either the first frequency measurement value or the second frequency measurement value as a result of frequency measurement. The system and method can improve the accuracy of frequency measurement.
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公开(公告)号：US20200127559A1
公开(公告)日：2020-04-23
申请号：US16605804
申请日：2017-09-11
发明人： Rongbin HU , Yonglu WANG , Zhengping ZHANG , Jian'an WANG , Guangbing CHEN , Dongbing FU , Yuxin WANG , Hequan JIANG , Gangyi HU
IPC分类号： H02M3/07
摘要： The present disclosure provides a negative voltage generating circuit having an automatic voltage adjustment function, including a negative voltage generating circuit and a feedback control module. The negative voltage generated by the negative voltage generating circuit is adjusted by the feedback control module. The negative voltage generating circuit having the automatic voltage adjustment function of the present disclosure can automatically adjust the charge current of the charge pump according to the load current, thereby realizing the stability of the output voltage, such that the traditional analog circuit structure can work normally under the extremely low power supply voltage, and is particularly suitable for the deep submicron process. The present disclosure also realizes the digital adjustment of the output voltage, the negative voltage output is no longer single, and can be adjusted according to actual needs.
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公开(公告)号：US20220228928A1
公开(公告)日：2022-07-21
申请号：US16636021
申请日：2017-09-11
发明人： Rongbin HU , Jian'an WANG , Dongbing FU , Guangbing CHEN , Zhengping ZHANG , Hequan JIANG , Gangyi HU
摘要： A digital temperature sensor circuit is disclosed. The digital temperature sensor circuit includes a proportional to the absolute temperature (PTAT) current source, generating a PTAT current proportional to absolute temperature; a sigma-delta modulation module, including an integrator, an analog-to-digital conversion unit, and a feedback digital-to-analog conversion unit; the integrator converts the PTAT current into temperature voltage; the analog-to-digital conversion unit compares the temperature voltage with a band gap reference voltage to generate a digital modulation signal with a duty ratio proportional to the temperature; the feedback digital-to-analog conversion unit adjusts the voltage input by the analog-to-digital conversion unit and controls the charging and discharging speed of the integrator; a digital filter, quantizing the digital modulation signal into a digital signal, and outputting the digital signal.
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公开(公告)号：US20230216502A1
公开(公告)日：2023-07-06
申请号：US17925323
申请日：2021-01-06
申请人： NO.24 RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION , Chongqing GigaChip Technology Co., Ltd.
发明人： Ting LI , Gangyi HU , Ruzhang LI , Yong ZHANG , Yabo NI , Dongbing FU , Jian'an WANG , Guangbing CHEN
IPC分类号： H03K19/0185
CPC分类号： H03K19/018521
摘要： An interface circuit and an electronic apparatus, including: a programmable current array (1), generating a first current and a second current transmitted to a common mode and differential mode generation circuit (2) according to an input code, and a third current and a fourth current transmitted to a driving bias generation circuit (3) according to the input code; the common mode and differential mode generation circuit (2), generating a common mode voltage according to the first current, and generating a high level voltage and a low level voltage according to the second current and the common mode voltage; a driving bias generation circuit (3), simulating a load according to the third and fourth currents, and generating a bias voltage based on the load and the low and high level voltages; an output driving circuit (4), converting an input signal into a differential signal in which the common mode voltage and a differential mode amplitude are configurable.
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公开(公告)号：US20210184689A1
公开(公告)日：2021-06-17
申请号：US17257315
申请日：2018-12-13
发明人： Jie PU , Gangyi HU , Dongbing FU , Zhengping ZHANG , Liang LI , Ting LI , Daiguo XU , Mingyuan XU , Xiaofeng SHEN , Xianjie WAN , Youhua WANG
摘要： The present disclosure provides a circuit for generating a multi-phase clock having random disturbance added thereto. The circuit for generating a clock includes a main clock module, a random signal generation module and a buffer matrix switch module. The main clock module generates N multi-phase clock signals; and the buffer matrix switch module randomly switches, under the control of a random control signal output by the random signal generation module, transmission paths of the input N multi-phase clock signals, and outputs N multi-phase clock signals with random disturbance. In the present disclosure, the clock phase error is whitened by adding random disturbance. Only with a small loss of signal-to-noise ratio, the influence of a multi-phase clock phase error on the performance of a high-precision TI ADC can be eliminated in real time, and the influence of the fluctuation of a clock phase error can be tracked and eliminated.
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公开(公告)号：US20210135678A1
公开(公告)日：2021-05-06
申请号：US17257011
申请日：2018-07-25
发明人： Jie PU , Gangyi HU , Jian'an WANG , Guangbing CHEN , Liang LI , Ting LI , Daiguo XU , Xingfa HUANG , Xi CHEN , Tiehu LI , Youhua WANG
IPC分类号： H03M1/06
摘要： The present disclosure provides an error compensation correction system and method for an analog-to-digital converter with a time interleaving structure, the system includes an analog-to-digital converter with a time interleaving structure, a master clock module, a packet clock module, an error correction module, an adaptive processing module and an overall MUX circuit. Through the error compensation correction system and method for the analog-to-digital converter with a time interleaving structure according to the present disclosure, lower correction hardware implementation complexity and higher stability are ensured. The system and method according to the present disclosure are particularly suitable for interchannel mismatch error correction of dense channel time interleaving ADC, and the performance of the time interleaving ADC is improved.
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公开(公告)号：US20220321136A1
公开(公告)日：2022-10-06
申请号：US17623613
申请日：2019-07-26
发明人： Ting LI , Gangyi HU , Ruzhang LI , Yong ZHANG , Dongbing FU , Zhengbo HUANG , Yabo NI , Jian'an WANG , Guangbing CHEN
IPC分类号： H03M1/10
摘要： A pipelined analog-to-digital converter and an output calibration method for the same. The pipelined analog-to-digital converter introduces an error calibration mechanism on the basis of traditional pipelined analog-to-digital converters through a control module, an equivalent gain error extraction module, an error storage module and a coding reconstruction module to compensate for gain errors and setup errors caused by operational amplifiers in a pipelined conversion module, so that the analog-to-digital conversion accuracy is improved, and requirements for the gain and bandwidth of the operational amplifier are relaxed, which can effectively reduce the power consumption of the analog-to-digital converter and the complexity of the corresponding analog circuit; a curve fitting method is adopted to obtain an ideal output sequence and then calculate errors; meanwhile, extraction and calibration of equivalent gain errors are all done in digital ways, and therefore accuracy thereof is high.
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公开(公告)号：US20210281269A1
公开(公告)日：2021-09-09
申请号：US17258165
申请日：2018-12-13
发明人： Ting LI , Gangyi HU , Ruzhang LI , Yong ZHANG , Zhengbo HUANG , Yabo NI , Xingfa HUANG , Jian'an WANG , Guangbing CHEN , Dongbing FU , Jun YUAN , Zicheng XU
IPC分类号： H03M1/06 , H03K5/02 , H03K17/687
摘要： The present disclosure provides a buffer circuit and a buffer. The buffer circuit includes: an input follower circuit for following the voltage change of the first input signal; an input follower linearity boosting circuit for improving follower linearity of the input follower circuit; a first voltage bootstrap circuit for bootstrapping the voltage of the first input signal; a second voltage bootstrap circuit for bootstrapping the voltage of the second input signal; a third voltage bootstrap circuit for providing corresponding quiescent operation point voltage; a compensation follower circuit for following the compensation voltage; a compensation follower linearity boosting circuit for improving follower linearity of the compensation follower circuit; a first load for collecting the buffered voltage; a bias circuit for providing a bias current for the buffer; a bias linearity boosting circuit for improving linearity of the bias circuit; a second load for generating a nonlinear compensation current.
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公开(公告)号：US20210278867A1
公开(公告)日：2021-09-09
申请号：US17258159
申请日：2018-12-13
发明人： Yan WANG , Gangyi HU , Tao LIU , Jian'an WANG , Daiguo XU , Guangbing CHEN , Dongbing FU
摘要： The present disclosure provides a differential reference voltage buffer, including: a buffer stage, including at least a first transistor and a second transistor; a control circuit, connected with the buffer stage and forming a negative feedback structure for generating a differential reference voltage; a current compensation circuit for compensating a resistive load current of the control circuit; and a drive stage for generating an output differential reference voltage. The differential reference voltage is generated according to an external input reference voltage and a common mode input voltage. The common mode voltage can be set separately, so that the flexibility is high. The current generated by a resistive network in the control circuit is compensated by the current compensation circuit, so that the current of a follow device in the buffer stage is not influenced by the control circuit, thereby generating a differential reference voltage with high accuracy output.
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公开(公告)号：US20180358976A1
公开(公告)日：2018-12-13
申请号：US15742835
申请日：2015-08-20
发明人： Jie PU , Gangyi HU , Xiaofeng SHEN , Xueliang XU , Dongbing FU , Ruitao ZHANG , Youhua WANG , Yuxin WANG , Guangbing CHEN , Ruzhang LI
IPC分类号： H03M1/06
CPC分类号： H03M1/0609 , H03M1/10
摘要： A method for an analog-to-digital converter correcting error estimation includes: according to a correction parameter preset initial value, generating a control signal and finely tuning a digital control delay cell, adjusting a delay amount, and correcting a clock phase error between channels; according to a correction parameter initial value, correcting a gain error between channels, generating and buffering a general correction signal, and triggering a counting cell to start counting, and calling the general correction signal in a buffer and generating a preliminary estimation result by using a cyclic correlation method; when counting to a preset value, setting low-pass filter accumulating cell enable ends and a correction parameter updating cell, generating an error estimation result from the preliminary estimation result and latching it, updating a clock correction parameter and a gain correction parameter according to a gradient descent method, and latching them, and resetting to carry out cyclic estimation correction.
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