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公开(公告)号：US20190036613A1
公开(公告)日：2019-01-31
申请号：US16069852
申请日：2017-04-26
发明人： Tomohiro TAKAMUKU , Etsushi YAMAZAKI , Yuki YOSHIDA , Katsuichi OYAMA , Yasuharu ONUMA , Akihiro YAMAGISHI
IPC分类号： H04B10/61 , H04B10/2507 , H04B10/077 , H04L27/01
CPC分类号： H04B10/2507 , H04B3/10 , H04B10/0775 , H04B10/61 , H04B10/616 , H04B2210/074 , H04B2210/252 , H04L27/01 , H04L27/26
摘要： In a method in which a compensation coefficient calculating portion (6) calculates a compensation coefficient of a compensation portion (5) which compensates transmission characteristics of a signal, a known signal is extracted from the signal. Next, a pseudo-random number is added to the extracted known signal. Next, the compensation coefficient is calculated by comparing a true value of the known signal with the known signal to which the pseudo-random number is added.
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公开(公告)号：US20180302211A1
公开(公告)日：2018-10-18
申请号：US15568696
申请日：2017-01-16
发明人： Yasuharu ONUMA , Masahiro TACHIBANA , Etsushi YAMAZAKI , Kazuhito TAKEI , Yuki YOSHIDA , Masayuki IKEDA , Yoshiaki KISAKA , Masahito TOMIZAWA
CPC分类号： H04L7/0079 , H03H17/0027 , H03H17/06 , H03H17/08 , H04B1/16 , H04L7/0029 , H04L7/005 , H04L7/033
摘要： An FIR filter convolutes sampled data obtained by sampling a reception signal with tap coefficients. A phase difference detector detects a phase difference between a synchronization timing of a signal waveform estimated from an output signal of the FIR filter and a sampling timing of the output signal. A tap coefficient adjuster adjusts the tap coefficients so as to reduce the phase difference detected by the phase difference detector and causes the sampling timing of the output signal of the FIR filter to track the synchronization timing.
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公开(公告)号：US20210075541A1
公开(公告)日：2021-03-11
申请号：US16955676
申请日：2018-12-20
发明人： Fumiaki NAKAGAWA , Yasuharu ONUMA , Katsuichi OYAMA , Yasuyuki ENDOH , Etsushi YAMAZAKI , Yoshiaki KISAKA , Masahito TOMIZAWA
摘要： An error correction device according to this invention includes a first correction unit configured to perform error correction decoding of data by a repetitive operation, and having a full operation state in which the repetitive operation of the error correction decoding is repeated until convergence is obtained and a save operation state in which the number of times of the repetitive operation of the error correction decoding is restricted to a predetermined number of times, an error information estimation unit configured to estimate an input error rate or an output error rate of the first correction unit using a decoding result of the first correction unit, and a control unit configured to control transition between the full operation state and the save operation state of the first correction unit based on at least one piece of information of the input error rate, the output error rate, and an operation time of the first correction unit. According to this invention, it is possible to provide an error correction device that can improve a transmission characteristic while suppressing power consumption.
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公开(公告)号：US20190074909A1
公开(公告)日：2019-03-07
申请号：US16072420
申请日：2017-04-13
发明人： Etsushi YAMAZAKI , Hiroyukl NOUCHI , Yasuharu ONUMA , Tomohiro TAKAMUKU , Katsuichi OYAMA , Kazuhito TAKEI , Masahito TOMIZAWA , Yoshiaki KISAKA , Mltsuteru YOSHIDA , Masanori NAKAMURA
IPC分类号： H04B10/61
CPC分类号： H04B10/6164 , H04B10/61 , H04B10/615 , H04B10/6165 , H04L27/3836 , H04L2027/0024
摘要： A symbol phase difference compensating portion (6) calculates a first phase difference which is a phase difference between a known pattern extracted from a received signal and a true value of the known pattern and performs phase compensation for the received signal based on the first phase difference. A tentative determination portion (12) tentatively determines an output signal of the symbol phase difference compensating portion (6) to acquire an estimated value of a phase. A first phase difference acquiring portion (13) acquires a second phase difference which is a phase difference between a phase of the output signal and the estimated value of the phase acquired by the tentative determination portion (12). A first phase difference compensating portion (14) performs phase compensation for the output signal based on the second phase difference.
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5.发明申请公开(公告)号：US20210273777A1
公开(公告)日：2021-09-02
申请号：US16972531
申请日：2019-06-06
发明人： Mitsuteru YOSHIDA , Yasuyuki ENDOH , Katsuichi OYAMA , Masayuki IKEDA , Tsutomu TAKEYA , Etsushi YAMAZAKI , Yoshiaki KISAKA , Masahito TOMIZAWA
IPC分类号： H04L7/04 , H04L27/227
摘要： A frame synchronization apparatus (10) according to this invention includes a multiplication unit (11) configured to multiply a received signal by an inverse complex number of a predetermined synchronization pattern with respect to a predetermined signal point on a complex space diagram for each of a plurality of symbols of the received signal, an addition average unit (12) configured to perform addition averaging of outputs from the multiplication unit for the plurality of symbols of the received signal, and a synchronization determination unit (13) configured to perform coincidence determination of whether an output from the addition average unit (12) falls within a predetermined coincidence determination range of the predetermined signal point, and determine a synchronization state of the frame synchronization based on a result of the coincidence determination. According to this invention, it is possible to provide a frame synchronization apparatus that correctly determines a synchronization state even if an error rate of received symbols is high.
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6.发明申请公开(公告)号：US20210167939A1
公开(公告)日：2021-06-03
申请号：US17174787
申请日：2021-02-12
发明人： Mitsuteru YOSHIDA , Yasuyuki ENDOH , Katsuichi OYAMA , Masayuki IKEDA , Tsutomu TAKEYA , Etsushi YAMAZAKI , Yoshiaki KISAKA , Masahito TOMIZAWA
IPC分类号： H04L7/00
摘要： A frame synchronization apparatus (10) according to this invention includes a multiplication unit (11) configured to multiply a received signal by an inverse complex number of a predetermined synchronization pattern with respect to a predetermined signal point on a complex space diagram for each of a plurality of symbols of the received signal, an addition average unit (12) configured to perform addition averaging of outputs from the multiplication unit for the plurality of symbols of the received signal, and a synchronization determination unit (13) configured to perform coincidence determination of whether an output from the addition average unit (12) falls within a predetermined coincidence determination range of the predetermined signal point, and determine a synchronization state of the frame synchronization based on a result of the coincidence determination. According to this invention, it is possible to provide a frame synchronization apparatus that correctly determines a synchronization state even if an error rate of received symbols is high.
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公开(公告)号：US20190074903A1
公开(公告)日：2019-03-07
申请号：US16085483
申请日：2017-05-26
发明人： Tomohiro TAKAMUKU , Etsushi YAMAZAKI , Katsuichi OYAMA , Yasuharu ONUMA , Kazuhito TAKEI , Masanori NAKAMURA , Mitsuteru YOSHIDA , Masahito TOMIZAWA , Yoshiaki KISAKA
IPC分类号： H04B10/2507 , H04B10/61 , H04B3/10 , H04L27/01
摘要： A reception circuit includes a first adaptive compensator compensating distortion of a received signal. An adaptive compensation coefficient calculator includes a known-signal detector detecting first and second known-signals from the received signal, a second adaptive compensator compensating distortion of the received signal, a tap coefficient initial value calculator calculating an initial value of a tap coefficient of the second adaptive compensator by comparing the first known-signal with its true value, a first phase shift compensator compensating phase shift of an output of the second adaptive compensator using the second known-signal, and a tap coefficient calculator calculating tap coefficients of the first and second adaptive compensators by comparing at least one of the first and second known-signals compensated by the second adaptive compensator and the first phase shift compensator with its true value.
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公开(公告)号：US20190013876A1
公开(公告)日：2019-01-10
申请号：US15748892
申请日：2016-10-17
发明人： Kengo HORIKOSHI , Mitsuteru YOSHIDA , Seiji OKAMOTO , Eiichi HOSOYA , Etsushi YAMAZAKI , Yasuharu ONUMA , Tomohiro TAKAMUKU , Naoki MIURA , Sadayuki YASUDA
IPC分类号： H04B10/61 , H04B10/532 , H04J14/06
CPC分类号： H04B10/6166 , G02F1/21 , G02F2001/212 , H04B10/2513 , H04B10/2569 , H04B10/532 , H04B10/616 , H04B10/6161 , H04B10/6162 , H04B10/6164 , H04B10/6165 , H04B2210/252 , H04J14/06 , H04L27/0014 , H04L27/362 , H04L27/3818 , H04L27/3827 , H04L27/3863 , H04L2027/0026
摘要： A coherent optical reception device includes a local oscillation laser that supplies laser light, a coherent optical reception front-end unit that receives a multi-level modulated optical signal, demodulates the optical signal on the basis of the laser light, and converts a demodulated optical signal into an electrical analog signal, an analog-to-digital converter that converts the analog signal into a digital signal, a compensation unit that compensates for an influence of dispersion due to a wavelength or a polarized wave of the optical signal and recovers a carrier phase of the digital signal, a constellation distortion compensation unit that compensates for constellation distortion of the multi-level modulation included in the digital signal in which an influence of dispersion is compensated for by the compensation unit, and an error correction decoding unit that performs error correction of the digital signal in which the constellation distortion is compensated for.
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公开(公告)号：US20190165868A1
公开(公告)日：2019-05-30
申请号：US16092391
申请日：2017-06-21
发明人： Yasuharu ONUMA , Etsushi YAMAZAKI , Tomohiro TAKAMUKU , Masahiro TACHIBANA , Mitsuteru YOSHIDA , Masahito TOMIZAWA , Seiji OKAMOTO
摘要： Fourier transform is performed on a reception signal to obtain a first calculation value. Fourier transform is performed on a known signal to obtain a second calculation value. The first calculation value is divided by the second calculation value to obtain a third calculation value. Inverse Fourier transform is performed on the third calculation value to obtain a fourth calculation value. A maximum value of an amplitude of the fourth calculation value and a sample point at which the maximum value is obtained are detected. The position of the known signal in the reception signal is detected from the sample point at which the maximum value is obtained.
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10.发明申请公开(公告)号：US20180252614A1
公开(公告)日：2018-09-06
申请号：US15555321
申请日：2016-10-04
发明人： Etsushi YAMAZAKI , Tomohiro TAKAMUKU , Yuki YOSHIDA , Mitsuteru YOSHIDA , Koki SHIBAHARA , Kengo HORIKOSHI , Yoshiaki KISAKA
IPC分类号： G01M11/02 , H04B10/079 , H04B10/2513 , H04B3/06 , G01M11/00
摘要： A Fourier-transformer performs Fourier transform on a filter coefficient output from an adaptive equalizer which comprises a finite impulse response filter of N taps (N represents an integer of 2 or more) in a time direction. An eigenvalue sum calculator integrates a frequency-differentiation result of the Fourier-transformed filter coefficient and a complex conjugate of the Fourier-transformed filter coefficient to calculate a matrix, and calculates a sum of two eigenvalues of the matrix. A proportionality factor calculator calculates a proportionality factor for frequency from the sum of the two eigenvalues.
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