公开(公告)号：US11003238B2

公开(公告)日：2021-05-11

申请号：US15583872

申请日：2017-05-01

Applicant: NVIDIA Corporation

Inventor： Anand Shanmugam Sundararajan ,  Ramachandiran V ,  Abhijeet Chandratre ,  Lordson Yue ,  Archana Srinivasaiah ,  Sachin Idgunji

IPC: G06F1/3234

Abstract: A hierarchy of interconnected memory retention (MR) circuits detect a clock gating mode being entered at any level of an integrated circuit. In response, the hierarchy automatically transitions memory at the clock gated level and all levels below the clock-gated level from a normal operating state to a memory retention state. When a memory transitions from a normal operating state to a memory retention state, the memory transitions from a higher power state (corresponding to the normal operating state) to a lower power state (corresponding to the memory retention state). Thus, in addition to the dynamic power savings caused by the clock gating mode, the hierarchy of MR circuits automatically transitions the memory modules at the clock gated level and all levels below the clock gated level to a lower power state. As a result, the leakage power consumption of the corresponding memory modules is reduced relative to prior approaches.

公开(公告)号：US12032840B2

公开(公告)日：2024-07-09

申请号：US17678784

申请日：2022-02-23

Applicant: NVIDIA CORPORATION

Inventor： Anand Shanmugam Sundararajan ,  Narayan Kulshrestha ,  Ka Yun Lee ,  Brian Smith ,  Madhukiran V. Swarna ,  Ramachandiran V ,  Kevin Wilder

IPC: G06F3/06

CPC classification number: G06F3/0634 ,  G06F3/0625 ,  G06F3/0653 ,  G06F3/0673

Abstract: Various embodiments include a computer memory system that dynamically adjusts a memory device performance feature, such as dynamic assist control, dynamic turbo mode, and/or the like, to improve the performance of memory devices in the memory system. The memory system enables or disables the memory device performance feature based on the operating voltage relative to a threshold voltage. If the operating voltage crosses the threshold voltage in one direction, then the memory device system enables the memory device performance feature. If the operating voltage crosses the threshold voltage in another direction, then the memory system disables the memory device performance feature. Various techniques enable the memory device performance feature to be employed even with complex integrated circuits that may include tens of thousands of devices that employ the memory device performance feature.