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公开(公告)号：US20190334489A1
公开(公告)日：2019-10-31
申请号：US16354277
申请日：2019-03-15
Applicant: NXP B.V.
Abstract: A power amplifier. The power amplifier includes a plurality of parallel coupled transistors. Each transistor has a control terminal coupled to receive a signal to be amplified and an output terminal coupled to a node. The power amplifier also includes a matching network having an input coupled to the node and an output coupleable to a load. The power amplifier further includes a first circuit branch forming a choke and harmonic trap of the power amplifier. The first circuit branch includes a first inductance, a second inductance and a first capacitor. The first inductance has a first terminal coupled to the node and a second terminal coupled to a first terminal of the second inductance. A second terminal of the second inductance is coupled to AC ground. The first capacitor is coupled in parallel with the second inductance.
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Patent Agency Ranking
公开(公告)号：US10367499B2
公开(公告)日：2019-07-30
申请号：US16026129
申请日：2018-07-03
Applicant: NXP B.V.
Inventor： Gian Hoogzaad , Amin Hamidian , Fanfan Meng
Abstract: A power supply ready indicator circuit is described. The power supply ready indicator circuit includes a first power-supply-ready-input interfacing with a first power supply rail; a second power-supply-ready-input interfacing with a second power supply rail; and a power ready indicator output. The power supply ready indicator circuit is configured to divide the voltage on the first power supply rail, and to compare the divided voltage with the second power supply rail voltage. The power supply ready indicator circuit generates a power ready signal on the power ready indicator output in response to the divided voltage value being greater than the second power supply rail voltage value. The final value of the first power supply rail voltage is greater than the final value of the second power supply rail voltage.
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公开(公告)号：US10742195B2
公开(公告)日：2020-08-11
申请号：US16210468
申请日：2018-12-05
Applicant: NXP B.V.
Inventor： Amin Hamidian , Gian Hoogzaad , Ivan Mitkov Zahariev
Abstract: A matching circuit comprising: an input-terminal configured to be connected to an active-circuit; an output-terminal configured to be connected to a downstream component; a current-source configured to provide a disabled-current; one or more diode-modules, each comprising a diode and a biasing-resistor in parallel with each other; and a reactive-matching-component that has a reactive impedance. The current source is configured to pass the disabled-current through the one or more diode-modules and the reactive-matching-component when the matching circuit is in a disabled-mode of operation such that they contribute to the impedance of the matching circuit between the input-terminal and the output-terminal.
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公开(公告)号：US20190068186A1
公开(公告)日：2019-02-28
申请号：US16026129
申请日：2018-07-03
Applicant: NXP B.V.
Inventor： Gian Hoogzaad , Amin Hamidian , Fanfan Meng
IPC: H03K17/22
CPC classification number: H03K17/223 , G06F1/28 , G06F11/3055 , G06F11/3058 , G11C5/148 , G11C7/20 , G11C17/18
Abstract: A power supply ready indicator circuit is described. The power supply ready indicator circuit includes a first power-supply-ready-input interfacing with a first power supply rail; a second power-supply-ready-input interfacing with a second power supply rail; and a power ready indicator output. The power supply ready indicator circuit is configured to divide the voltage on the first power supply rail, and to compare the divided voltage with the second power supply rail voltage. The power supply ready indicator circuit generates a power ready signal on the power ready indicator output in response to the divided voltage value being greater than the second power supply rail voltage value. The final value of the first power supply rail voltage is greater than the final value of the second power supply rail voltage.
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公开(公告)号：US10826446B2
公开(公告)日：2020-11-03
申请号：US16354277
申请日：2019-03-15
Applicant: NXP B.V.
Abstract: A power amplifier. The power amplifier includes a plurality of parallel coupled transistors. Each transistor has a control terminal coupled to receive a signal to be amplified and an output terminal coupled to a node. The power amplifier also includes a matching network having an input coupled to the node and an output coupleable to a load. The power amplifier further includes a first circuit branch forming a choke and harmonic trap of the power amplifier. The first circuit branch includes a first inductance, a second inductance and a first capacitor. The first inductance has a first terminal coupled to the node and a second terminal coupled to a first terminal of the second inductance. A second terminal of the second inductance is coupled to AC ground. The first capacitor is coupled in parallel with the second inductance.
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公开(公告)号：US20190181840A1
公开(公告)日：2019-06-13
申请号：US16210468
申请日：2018-12-05
Applicant: NXP B.V.
Inventor： Amin Hamidian , Gian Hoogzaad , Ivan Mitkov Zahariev
CPC classification number: H03H11/30 , H03F1/56 , H03F3/189 , H03F3/195 , H03F2200/294 , H03G1/0088
Abstract: A matching circuit comprising: an input-terminal configured to be connected to an active-circuit; an output-terminal configured to be connected to a downstream component; a current-source configured to provide a disabled-current; one or more diode-modules, each comprising a diode and a biasing-resistor in parallel with each other; and a reactive-matching-component that has a reactive impedance. The current source is configured to pass the disabled-current through the one or more diode-modules and the reactive-matching-component when the matching circuit is in a disabled-mode of operation such that they contribute to the impedance of the matching circuit between the input-terminal and the output-terminal.
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