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公开(公告)号:US10739846B2
公开(公告)日:2020-08-11
申请号:US16215780
申请日:2018-12-11
Applicant: NXP B.V.
Inventor: Ajay Kapoor , Juan Diego Echeverri Escobar , Kristof Blutman , Sebastien Antonius Josephus Fabrie , Jose de Jesus Pineda de Gyvez , Hamed Fatemi
IPC: H03L5/00 , G06F1/3296 , H03K3/03
Abstract: An electronic device includes a digital circuit, a power delivery subsystem configured to provide a supply voltage and a body-biasing voltage to the digital circuit, and a controller a controller coupled to the power delivery subsystem. The controller is configured to determine a process parameter for the electronic device, determine a current temperature parameter for the electronic device, concurrently determine a first coarse-grain level for the supply voltage and a second coarse-grain level for the body-biasing voltage based on the process parameter, the current temperature parameter, and a frequency of a clock signal to be supplied to the digital circuit, and to determine a fine-grain level for the supply voltage.
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公开(公告)号:US10270448B1
公开(公告)日:2019-04-23
申请号:US15980882
申请日:2018-05-16
Applicant: NXP B.V.
Inventor: Kristof Blutman , Sebastien Antonius Josephus Fabrie , Juan Diego Echeverri Escobar , Ajay Kapoor , Jose de Jesus Pineda de Gyvez , Hamed Fatemi
IPC: H03K19/0185
Abstract: A level shifter circuit is described herein for shifting a signal from a first voltage domain to a second voltage domain. The level shifter circuit includes two current paths between a supply terminal of the first voltage domain and a supply terminal of the second voltage domain. The first and second current paths each include a differential transistor that receives a signal from a pulse generator in a first voltage domain. The pulse generator provides pulses to the differential transistors based on an input signal to be translated to the second voltage domain. The level shifter includes a latch circuit in the second voltage domain that includes two inputs where each input is biased at a node of one of the current paths. Each current path includes a bias transistor whose control terminal receives a compensated biasing voltage for biasing the bias transistor. The compensated biasing voltage is compensated to account for drive strength variation of at least one transistor in each current path.
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公开(公告)号:US20170012628A1
公开(公告)日:2017-01-12
申请号:US14794411
申请日:2015-07-08
Applicant: NXP B.V.
Inventor: Kristof Blutman , Ajay Kapoor , Jose Pineda de Gyvez , Arnoud van der Wel
IPC: H03K19/0185
CPC classification number: H03K19/018514 , H03K3/356182 , H03K5/13 , H03K19/0185
Abstract: Aspects of the disclosure are directed to communications between respective power domains (circuitry) that may operate in a stacked arrangement in which the each domain operates over a different voltage range. A first circuit provides differential outputs that vary between first and second voltage levels, based on transitions of an input signal received from a first one of the power domains. First and second driver circuits are respectively coupled to the first and second differential outputs. A third driver circuit operates with the first and second circuits to level-shift the input signal from the first power domain to an output signal on a second power domain by driving an output circuit at the second voltage level in response to the input signal being at the first voltage level, and driving the output circuit at a third voltage level in response to the input signal being at the second voltage level.
Abstract translation: 本公开的方面涉及可以在每个域在不同电压范围上操作的堆叠布置中操作的相应功率域(电路)之间的通信。 第一电路提供基于从第一功率域接收的输入信号的转变而在第一和第二电压电平之间变化的差分输出。 第一和第二驱动器电路分别耦合到第一和第二差分输出。 第三驱动器电路与第一和第二电路一起工作,以响应于输入信号处于第二电压电平,通过驱动处于第二电压电平的输出电路来将输入信号从第一功率域电平移位到第二电源域上的输出信号 第一电压电平,并且响应于输入信号处于第二电压电平,将输出电路驱动在第三电压电平。
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公开(公告)号:US20200183486A1
公开(公告)日:2020-06-11
申请号:US16215780
申请日:2018-12-11
Applicant: NXP B.V.
Inventor: Ajay Kapoor , Juan Diego Echeverri Escobar , Kristof Blutman , Sebastien Antonius Josephus Fabrie , Jose de Jesus Pineda de Gyvez , Hamed Fatemi
IPC: G06F1/3296 , H03K3/03
Abstract: An electronic device includes a digital circuit, a power delivery subsystem configured to provide a supply voltage and a body-biasing voltage to the digital circuit, and a controller a controller coupled to the power delivery subsystem. The controller is configured to determine a process parameter for the electronic device, determine a current temperature parameter for the electronic device, concurrently determine a first coarse-grain level for the supply voltage and a second coarse-grain level for the body-biasing voltage based on the process parameter, the current temperature parameter, and a frequency of a clock signal to be supplied to the digital circuit, and to determine a fine-grain level for the supply voltage.
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公开(公告)号:US20200073453A1
公开(公告)日:2020-03-05
申请号:US16118749
申请日:2018-08-31
Applicant: NXP B.V.
Inventor: Ajay Kapoor , Kristof Blutman , Juan Diego Echeverri Escobar , Jose de Jesus Pineda de Gyvez , Jurgen Geerlings , Hamed Fatemi
Abstract: An electronic device including a power source providing a source voltage, a capacitor, a primary regulator circuit, an always-on load that is active during a low power mode, and a recycle control circuit. The primary regulator circuit receives the source voltage and has an output that maintains a charge on the capacitor during an active mode. The primary regulator circuit does not contribute to a charge on the capacitor during the low power mode. The recycle control circuit includes a select circuit and a select control circuit. The select circuit selects, based on a control signal, between the voltage of the capacitor and at least one supply voltage including or otherwise developed using the source voltage to provide power to the always-on load during the low power mode. The select control circuit provides the control signal to control power provided to the always-on load during the low power mode.
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公开(公告)号:US11163346B2
公开(公告)日:2021-11-02
申请号:US16118749
申请日:2018-08-31
Applicant: NXP B.V.
Inventor: Ajay Kapoor , Kristof Blutman , Juan Diego Echeverri Escobar , Jose de Jesus Pineda de Gyvez , Jurgen Geerlings , Hamed Fatemi
Abstract: An electronic device including a power source providing a source voltage, a capacitor, a primary regulator circuit, an always-on load that is active during a low power mode, and a recycle control circuit. The primary regulator circuit receives the source voltage and has an output that maintains a charge on the capacitor during an active mode. The primary regulator circuit does not contribute to a charge on the capacitor during the low power mode. The recycle control circuit includes a select circuit and a select control circuit. The select circuit selects, based on a control signal, between the voltage of the capacitor and at least one supply voltage including or otherwise developed using the source voltage to provide power to the always-on load during the low power mode. The select control circuit provides the control signal to control power provided to the always-on load during the low power mode.
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公开(公告)号:US09917588B2
公开(公告)日:2018-03-13
申请号:US14794411
申请日:2015-07-08
Applicant: NXP B.V.
Inventor: Kristof Blutman , Ajay Kapoor , Jose Pineda de Gyvez , Arnoud van der Wel
IPC: H03L5/00 , H03K19/0185 , H03K5/13
CPC classification number: H03K19/018514 , H03K3/356182 , H03K5/13 , H03K19/0185
Abstract: Aspects of the disclosure are directed to communications between respective power domains (circuitry) that may operate in a stacked arrangement in which the each domain operates over a different voltage range. A first circuit provides differential outputs that vary between first and second voltage levels, based on transitions of an input signal received from a first one of the power domains. First and second driver circuits are respectively coupled to the first and second differential outputs. A third driver circuit operates with the first and second circuits to level-shift the input signal from the first power domain to an output signal on a second power domain by driving an output circuit at the second voltage level in response to the input signal being at the first voltage level, and driving the output circuit at a third voltage level in response to the input signal being at the second voltage level.
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公开(公告)号:US09912335B2
公开(公告)日:2018-03-06
申请号:US14794485
申请日:2015-07-08
Applicant: NXP B.V.
Inventor: Ajay Kapoor , Kristof Blutman , Jose Pineda de Gyvez , Arnoud van der Wel
IPC: H03L5/00 , H03K19/0185 , G06F1/32 , H03K19/00 , H03K19/0175
CPC classification number: H03K19/018507 , G06F1/3234 , H03K19/0019 , H03K19/0175
Abstract: Aspects of this disclosure are directed to level-shifting approaches with communications between respective circuits. As may be implemented in accordance with one or more embodiments characterized herein, a voltage level of communications passed between respective circuits are selectively shifted. Where the respective circuits operate under respective power domains that are shifted in voltage range relative to one another, the voltage level of the communications is shifted. This approach may, for example, facilitate power-savings for stacked circuits in which a low-level voltage of one circuit is provided as a high-level voltage for another circuit. When the respective circuits operate under a common power domain, the communications are passed directly between the respective circuits (e.g., bypassing any level-shifting, and facilitating fast communication).
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公开(公告)号:US20170012627A1
公开(公告)日:2017-01-12
申请号:US14794485
申请日:2015-07-08
Applicant: NXP B.V.
Inventor: Ajay Kapoor , Kristof Blutman , Jose Pineda de Gyvez , Arnoud van der Wel
IPC: H03K19/0185
CPC classification number: H03K19/018507 , G06F1/3234 , H03K19/0019 , H03K19/0175
Abstract: Aspects of this disclosure are directed to level-shifting approaches with communications between respective circuits. As may be implemented in accordance with one or more embodiments characterized herein, a voltage level of communications passed between respective circuits are selectively shifted. Where the respective circuits operate under respective power domains that are shifted in voltage range relative to one another, the voltage level of the communications is shifted. This approach may, for example, facilitate power-savings for stacked circuits in which a low-level voltage of one circuit is provided as a high-level voltage for another circuit. When the respective circuits operate under a common power domain, the communications are passed directly between the respective circuits (e.g., bypassing any level-shifting, and facilitating fast communication).
Abstract translation: 本公开的方面涉及通过各个电路之间的通信的电平转换方法。 如可以根据本文特征的一个或多个实施例来实现的,在各个电路之间通过的通信的电压电平被选择性地移位。 在各个电路在相对于彼此在电压范围内移位的相应功率域下工作时,通信的电压电平发生偏移。 例如,该方法可以有助于对于其中提供一个电路的低电平电压作为另一个电路的高电平电压的堆叠电路的功率节省。 当各个电路在公共功率域下工作时,通信直接在相应的电路之间传递(例如,绕过任何电平转换,并促进快速通信)。
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