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公开(公告)号：US11163346B2
公开(公告)日：2021-11-02
申请号：US16118749
申请日：2018-08-31
Applicant: NXP B.V.
Inventor： Ajay Kapoor , Kristof Blutman , Juan Diego Echeverri Escobar , Jose de Jesus Pineda de Gyvez , Jurgen Geerlings , Hamed Fatemi
Abstract: An electronic device including a power source providing a source voltage, a capacitor, a primary regulator circuit, an always-on load that is active during a low power mode, and a recycle control circuit. The primary regulator circuit receives the source voltage and has an output that maintains a charge on the capacitor during an active mode. The primary regulator circuit does not contribute to a charge on the capacitor during the low power mode. The recycle control circuit includes a select circuit and a select control circuit. The select circuit selects, based on a control signal, between the voltage of the capacitor and at least one supply voltage including or otherwise developed using the source voltage to provide power to the always-on load during the low power mode. The select control circuit provides the control signal to control power provided to the always-on load during the low power mode.
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公开(公告)号：US11074150B2
公开(公告)日：2021-07-27
申请号：US16389049
申请日：2019-04-19
Applicant: NXP B.V.
Inventor： Jurgen Geerlings
IPC: G06F11/00 , G06F11/26 , G06F30/30 , G01R31/319 , G06F119/12 , G05F3/02
Abstract: A chip health monitor includes a processor configured to operate as a state machine based on instructions stored in a storage device. The state machine is configured to exercise a signal path in a chip in response to a condition and determine presence of an error in the signal path based on results from the exercise. The state machine is configured to compensate for the error by changing at least one operational parameter of the chip.
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公开(公告)号：US20170359324A1
公开(公告)日：2017-12-14
申请号：US15181099
申请日：2016-06-13
Applicant: NXP B.V.
Inventor： Jurgen Geerlings , Ghiath Al-Kadi , Piotr Polak
IPC: H04L29/06
CPC classification number: H04L63/061 , H04L63/0876 , H04L2463/061 , H04L2463/062 , H04W12/00512 , H04W12/00522 , H04W12/04
Abstract: According to a first aspect of the present disclosure, a method for facilitating secure communication in a network is conceived, comprising: encrypting, by a source node in the network, a cryptographic key using a device key as an encryption key, wherein said device key is based on a device identifier that identifies a destination node in the network; transmitting, by said source node, the encrypted cryptographic key to the destination node. According to a second aspect of the present disclosure, a corresponding non-transitory, tangible computer program product is provided. According to a third aspect of the present disclosure, a corresponding system for facilitating secure communication in a network is provided.
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公开(公告)号：US10657015B2
公开(公告)日：2020-05-19
申请号：US15906485
申请日：2018-02-27
Applicant: NXP B.V.
Inventor： Ajay Kapoor , Jurgen Geerlings
Abstract: A memory system is disclosed, comprising a primary memory module, a secondary memory module, and a controller. The controller is configured to identify addresses in the primary memory module requiring correction, and is further configured to receive a memory access request identifying an address in the primary memory module. The controller is configured to determine whether the address is identified as requiring correction and, if it is not, to direct the memory access request to the primary memory module. If the address is identified as requiring correction, the controller is configured to direct the memory access request to the secondary memory module.
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公开(公告)号：US09846192B2
公开(公告)日：2017-12-19
申请号：US14631548
申请日：2015-02-25
Applicant: NXP B.V.
Inventor： Jurgen Geerlings
IPC: G01R31/00 , G01R31/28 , G01R31/317 , G01R1/067
CPC classification number: G01R31/2886 , G01R1/067 , G01R31/2884 , G01R31/31713 , G01R31/31724
Abstract: Aspects of the present disclosure are directed to methods, apparatuses and systems involving a switched probe contact. According to an example embodiment, an apparatus includes logic circuitry, a first circuit to communicate signals with the logic circuitry, and a first bond pad connected to the first circuit via a first circuit path. The apparatus also includes a second circuit to communicate signals with the logic circuitry, and a second bond pad connected to the second circuit via a second circuit path. A probe contact is connected to the first bond pad and communicates signals with an external probe, and a switch circuit is connected to the probe contact and the second circuit path. The switch circuit communicates signals between the probe contact and the second circuit path by selectively connecting and disconnecting the probe contact to the second circuit path.
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Patent Agency Ranking
公开(公告)号：US10554640B2
公开(公告)日：2020-02-04
申请号：US15181099
申请日：2016-06-13
Applicant: NXP B.V.
Inventor： Jurgen Geerlings , Ghiath Al-Kadi , Piotr Polak
IPC: H04L29/06
Abstract: According to a first aspect of the present disclosure, a method for facilitating secure communication in a network is conceived, comprising: encrypting, by a source node in the network, a cryptographic key using a device key as an encryption key, wherein said device key is based on a device identifier that identifies a destination node in the network; transmitting, by said source node, the encrypted cryptographic key to the destination node. According to a second aspect of the present disclosure, a corresponding non-transitory, tangible computer program product is provided. According to a third aspect of the present disclosure, a corresponding system for facilitating secure communication in a network is provided.
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公开(公告)号：US20160245859A1
公开(公告)日：2016-08-25
申请号：US14631548
申请日：2015-02-25
Applicant: NXP B.V.
Inventor： Jurgen Geerlings
IPC: G01R31/28 , G01R1/067 , G01R31/317
CPC classification number: G01R31/2886 , G01R1/067 , G01R31/2884 , G01R31/31713 , G01R31/31724
Abstract: Aspects of the present disclosure are directed to methods, apparatuses and systems involving a switched probe contact. According to an example embodiment, an apparatus includes logic circuitry, a first circuit to communicate signals with the logic circuitry, and a first bond pad connected to the first circuit via a first circuit path. The apparatus also includes a second circuit to communicate signals with the logic circuitry, and a second bond pad connected to the second circuit via a second circuit path. A probe contact is connected to the first bond pad and communicates signals with an external probe, and a switch circuit is connected to the probe contact and the second circuit path. The switch circuit communicates signals between the probe contact and the second circuit path by selectively connecting and disconnecting the probe contact to the second circuit path.
Abstract translation: 本公开的方面涉及涉及切换探针接触的方法，装置和系统。 根据示例实施例，一种装置包括逻辑电路，用于与逻辑电路通信信号的第一电路，以及经由第一电路路径连接到第一电路的第一接合焊盘。 该装置还包括用于与逻辑电路通信信号的第二电路和经由第二电路路径连接到第二电路的第二接合焊盘。 探针接点连接到第一接合焊盘，并与外部探针通信信号，并且开关电路连接到探针接点和第二电路路径。 开关电路通过选择性地将探针接点连接到第二电路路径并将其断开，从而在探针接点和第二电路路径之间传递信号。
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公开(公告)号：US10050964B2
公开(公告)日：2018-08-14
申请号：US15093904
申请日：2016-04-08
Applicant: NXP B.V.
Inventor： Ghiath Al-Kadi , Jurgen Geerlings , Piotr Polak , Jan-Willem Vogel
Abstract: According to a first aspect of the present disclosure, a method is conceived for securing data communicated in a network, the method comprising: receiving, by a destination node in the network, at least one message transmitted by a source node in the network; generating, by said destination node, a session key by executing a one-way function that takes at least a part of a last received message and an initial key as input parameters; using, by said destination node, the session key for encrypting or decrypting said data. Furthermore, according to a second aspect of the present disclosure, a corresponding computer program product is conceived. Furthermore, according to a third aspect of the present disclosure, a corresponding system is conceived.
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公开(公告)号：US10720838B1
公开(公告)日：2020-07-21
申请号：US16431927
申请日：2019-06-05
Applicant: NXP B.V.
Inventor： Jitendra Prabhakar Harshey , Olivier Trescases , Edevaldo Pereira Da Silva Junior , Stefano Pietri , Jurgen Geerlings , Hendrik Johannes Bergveld
Abstract: Embodiments provide forced-burst voltage regulation for burst mode direct-current-to-direct-current (DC-DC) converters in integrated circuits. The DC-DC converter generates an output voltage and operates in a burst mode to raise the output voltage to a threshold voltage. A controller is coupled to the DC-DC converter. In operation, the DC-DC converter is configured to perform the burst mode based upon a low-voltage detection for the output voltage. The DC-DC converter is further configured to perform the burst mode when a force-burst command is asserted by the controller to the DC-DC converter regardless of a state for the low-voltage detection. For one embodiment, the force-burst command is asserted as a burst control signal from the controller to the DC-DC converter to generate a long quiet period for sensitive actions. For another embodiment, the force-burst command is asserted using enable and refresh control signals to facilitate low-power operation.
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公开(公告)号：US20200073453A1
公开(公告)日：2020-03-05
申请号：US16118749
申请日：2018-08-31
Applicant: NXP B.V.
Inventor： Ajay Kapoor , Kristof Blutman , Juan Diego Echeverri Escobar , Jose de Jesus Pineda de Gyvez , Jurgen Geerlings , Hamed Fatemi
Abstract: An electronic device including a power source providing a source voltage, a capacitor, a primary regulator circuit, an always-on load that is active during a low power mode, and a recycle control circuit. The primary regulator circuit receives the source voltage and has an output that maintains a charge on the capacitor during an active mode. The primary regulator circuit does not contribute to a charge on the capacitor during the low power mode. The recycle control circuit includes a select circuit and a select control circuit. The select circuit selects, based on a control signal, between the voltage of the capacitor and at least one supply voltage including or otherwise developed using the source voltage to provide power to the always-on load during the low power mode. The select control circuit provides the control signal to control power provided to the always-on load during the low power mode.
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