公开(公告)号：US09484398B2

公开(公告)日：2016-11-01

申请号：US14925205

申请日：2015-10-28

Applicant: NXP B.V.

Inventor： Petrus Hubertus Cornelis Magnee ,  Patrick Sebel

IPC: H01L21/00 ,  H01L49/02 ,  H01L21/768 ,  H01L21/311 ,  H01L23/522 ,  H01L21/31 ,  H01L21/3213 ,  H01L23/538 ,  H01L27/06 ,  H01L23/532

CPC classification number: H01L28/60 ,  H01L21/31 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/32133 ,  H01L21/7687 ,  H01L21/76879 ,  H01L21/76897 ,  H01L21/76898 ,  H01L23/5223 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/5384 ,  H01L23/5386 ,  H01L27/0629 ,  H01L28/40 ,  H01L28/75 ,  H01L2924/0002 ,  H01L2924/00

Abstract: There is disclosed a metal-insulator-metal, MIM, capacitor. The MIM capacitor comprises a MIM stack formed within an interconnect metal layer. The interconnect metal layer is utilized as an electrical connection to a metal layer of the MIM stack.

Abstract translation: 公开了一种金属绝缘体金属，MIM，电容器。 MIM电容器包括形成在互连金属层内的MIM堆叠。 互连金属层用作与MIM堆叠的金属层的电连接。

公开(公告)号：US20250048663A1

公开(公告)日：2025-02-06

申请号：US18783484

申请日：2024-07-25

Applicant: NXP B.V.

Inventor： Johannes Josephus Theodorus Marinus Donkers ,  Ronald Willem Arnoud Werkman ,  Patrick Sebel

IPC: H01L29/66 ,  H01L21/324 ,  H01L29/08 ,  H01L29/10 ,  H01L29/16 ,  H01L29/161 ,  H01L29/732

Abstract: A method of making a bipolar transistor includes forming an extrinsic base layer over an oxide layer on a substrate. After an emitter window is opened in the extrinsic base layer, a sidewall spacer is formed on the sidewall of the emitter window. After forming the sidewall spacer, the oxide layer may be etched away to expose the substrate and to form a cavity extending beneath the extrinsic base layer. Subsequently, a monocrystalline emitter is formed in the emitter window whereby a peripheral part of the monocrystalline emitter fills the cavity. An anneal is then performed to form an emitter diffusion region and a base link region of the bipolar transistor.

公开(公告)号：US20240304707A1

公开(公告)日：2024-09-12

申请号：US18595511

申请日：2024-03-05

Applicant: NXP B.V.

Inventor： Johannes Josephus Theodorus Marinus Donkers ,  Jay Paul John ,  James Albert Kirchgessner ,  Patrick Sebel

IPC: H01L29/737 ,  H01L29/08 ,  H01L29/10 ,  H01L29/165 ,  H01L29/66

CPC classification number: H01L29/7378 ,  H01L29/0817 ,  H01L29/0826 ,  H01L29/1004 ,  H01L29/165 ,  H01L29/66242

Abstract: Disclosed is a SiGe, HBT, and method of manufacturing the same, comprising: an n-doped buried collector; a p-doped SiGe base layer, within a layer stack, the layer stack being over and in direct contact with the collector; an n-doped monocrystalline silicon emitter; an epitaxial silicon base contact layer over a second area of the layer stack; a polycrystalline silicon emitter contact layer; an oxide layer over a third area of the layer stack between the first and second areas, wherein the oxide layer and the n-doped monocrystalline silicon emitter are within a window, having sidewalls, in the epitaxial silicon layer; dielectric spacers on the sidewalls of the window and over the oxide layer, and providing electrical isolation between the epitaxial silicon layer and the polycrystalline silicon layer; the epitaxial silicon layer extending beneath the dielectric spacers on the sidewalls of the window.

公开(公告)号：US20250098189A1

公开(公告)日：2025-03-20

申请号：US18824976

申请日：2024-09-05

Applicant: NXP B.V.

Inventor： Jay Paul John ,  James Albert Kirchgessner ,  Johannes Josephus Theodorus Marinus Donkers ,  Ljubo Radic ,  Patrick Sebel

IPC: H01L29/66 ,  H01L29/08 ,  H01L29/10 ,  H01L29/737

Abstract: A bipolar transistor and a method of making a bipolar transistor. The method includes providing a semiconductor substrate having a major surface, one or more layers located beneath the major surface for forming an intrinsic base, and a collector. The method also includes depositing a first oxide layer on the major surface, depositing a second oxide layer on the first oxide layer, and depositing an extrinsic base layer on the second oxide layer. The method further includes forming an emitter window through the extrinsic base layer. The method also includes removing at least a part of the second oxide layer to form a first cavity and forming an initial part of a base link region in the first cavity. The method also includes removing at least a part of the first oxide layer to form a second cavity and filling the second cavity to form a completed base link region.

公开(公告)号：US20240234552A1

公开(公告)日：2024-07-11

申请号：US18527890

申请日：2023-12-04

Applicant: NXP B.V.

Inventor： Jay Paul John ,  Patrick Sebel ,  James Albert Kirchgessner

IPC: H01L29/737 ,  H01L29/165 ,  H01L29/66

CPC classification number: H01L29/7371 ,  H01L29/165 ,  H01L29/66242

Abstract: Disclosed is a method of manufacturing a silicon bipolar junction transistor device, the method comprising a sequence of steps including: depositing a polysilicon layer over at least a device region; depositing a dielectric layer over the polysilicon layer; patterning a photoresist layer and etching a window in the dielectric layer and the polysilicon layer through an opening in the photoresist layer; etching a SiGe layer stack through the window, to expose a silicon layer thereunder; patterning a further photoresist layer to expose at least the window; and doping the silicon layer by ion implantation through the window to form a base region. A corresponding BJT device is also disclosed.

公开(公告)号：US20160049461A1

公开(公告)日：2016-02-18

申请号：US14925205

申请日：2015-10-28

Applicant: NXP B.V.

Inventor： Petrus Hubertus Cornelis Magnee ,  Patrick Sebel

IPC: H01L49/02 ,  H01L21/31 ,  H01L23/538 ,  H01L21/3213 ,  H01L27/06 ,  H01L21/768 ,  H01L21/311

CPC classification number: H01L28/60 ,  H01L21/31 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/32133 ,  H01L21/7687 ,  H01L21/76879 ,  H01L21/76897 ,  H01L21/76898 ,  H01L23/5223 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/5384 ,  H01L23/5386 ,  H01L27/0629 ,  H01L28/40 ,  H01L28/75 ,  H01L2924/0002 ,  H01L2924/00

Abstract: There is disclosed a metal-insulator-metal, MIM, capacitor. The MIM capacitor comprises a MIM stack formed within an interconnect metal layer. The interconnect metal layer is utilised as an electrical connection to a metal layer of the MIM stack.

Abstract translation: 公开了一种金属绝缘体金属，MIM，电容器。 MIM电容器包括形成在互连金属层内的MIM堆叠。 互连金属层用作与MIM堆叠的金属层的电连接。