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公开(公告)号：US11415626B2
公开(公告)日：2022-08-16
申请号：US17118828
申请日：2020-12-11
Applicant: NXP B.V.
Inventor： Jan-Peter Schat , Abdellatif Zanati , Henrik Asendorf , Maristella Spella , Waqas Hassan Syed , Giorgio Carluccio , Antonius Johannes Matheus de Graauw
IPC: G01R31/311
Abstract: A method of testing a semiconductor device. An apparatus comprising a semiconductor device and a test apparatus. The semiconductor device includes an integrated circuit and a plurality of external radiating elements at a surface of the device, the radiating elements include transmit elements and receive elements. The test apparatus includes a surface for placing against the surface of the device. The test apparatus also includes at least one waveguide, which extends through the test apparatus for routing electromagnetic radiation transmitted by one of the transmit elements of the device to one of the receive elements of the device. Each waveguide comprises a plurality of waveguide openings for coupling electromagnetically to corresponding radiating elements of the plurality of radiating elements located at the surface of the device. A spacing between the waveguide openings of each waveguide is larger than, or smaller than a spacing between the corresponding radiating elements.
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公开(公告)号：US20240106105A1
公开(公告)日：2024-03-28
申请号：US18469605
申请日：2023-09-19
Applicant: NXP B.V.
Inventor： Waqas Hassan Syed , Ralph Matthijs van Schelven , Giorgio Carluccio , Pieter Lok , Antonius Johannes Matheus de Graauw , Konstantinos Doris , Daniele Cavallo , Andrea Neto
CPC classification number: H01Q1/2283 , H01Q1/42 , H01Q21/061
Abstract: In accordance with a first aspect of the present disclosure, an antenna unit is provided, comprising: an integrated circuit package containing an integrated circuit die and an antenna structure coupled to the integrated circuit die; a dielectric layer separated from the integrated circuit package, wherein the dielectric layer is placed at a predefined distance above an upper surface of the integrated circuit package. In accordance with a second aspect of the present disclosure, a corresponding method of producing an antenna unit is conceived.
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公开(公告)号：US20240395737A1
公开(公告)日：2024-11-28
申请号：US18663503
申请日：2024-05-14
Applicant: NXP B.V.
Inventor： Ralph Matthijs van Schelven , Waqas Hassan Syed , Konstantinos Doris , Lukas Frederik Tiemeijer , Gilles Montoriol , Francis Jean Guy AUVRAY
IPC: H01L23/66 , H01L23/498
Abstract: A package for an integrated circuit, IC, the package comprising an interposer comprising: a first metal layer including a first metal plate; a second metal layer including a second metal plate; and a dielectric layer separating the first metal layer and the second metal layer, wherein the first metal plate and the second metal plate are arranged to form a parallel plate waveguide, PPW, and wherein the first metal plate comprises a slot for receiving one or more differential signals from the IC.
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Patent Agency Ranking
公开(公告)号：US12003010B2
公开(公告)日：2024-06-04
申请号：US17558934
申请日：2021-12-22
Applicant: NXP B.V.
Inventor： Lukas Frederik Tiemeijer , Waqas Hassan Syed , Ralf Maria Theodoor Pijper , Harish Nandagopal
CPC classification number: H01P1/20372 , H01P1/20381 , H01Q13/206 , H01P5/10
Abstract: A compact planar balun formed on a substrate including a hairpin-shaped conductive microstrip and a single-ended contact. The hairpin-shaped conductive microstrip includes first and second linear segments integrally formed with a U-shaped segment, and a single-ended contact is conductively coupled at a location along the first linear segment. The first and second linear segments each have a first characteristic impedance and are in parallel with each other having a first end forming first and second differential contacts and having a second end. The U-shaped segment has a second characteristic impedance that is less than the first characteristic impedance in order to achieve proper scatter parameter alignment. The U-shaped segment may be generally formed thicker or wider than the linear segments to achieve a reduced characteristic impedance. In the alternative or in addition, co-planer ground metal is formed closer to the U-shaped segment to achieve a reduced characteristic impedance.
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公开(公告)号：US20230198114A1
公开(公告)日：2023-06-22
申请号：US17558934
申请日：2021-12-22
Applicant: NXP B.V.
Inventor： Lukas Frederik Tiemeijer , Waqas Hassan Syed , Ralf Maria Theodoor Pijper , Harish Nandagopal
CPC classification number: H01P1/20372 , H01P1/20381 , H01Q13/206 , H01P5/10
Abstract: A compact planar balun formed on a substrate including a hairpin-shaped conductive microstrip and a single-ended contact. The hairpin-shaped conductive microstrip includes first and second linear segments integrally formed with a U-shaped segment, and a single-ended contact is conductively coupled at a location along the first linear segment. The first and second linear segments each have a first characteristic impedance and are in parallel with each other having a first end forming first and second differential contacts and having a second end. The U-shaped segment has a second characteristic impedance that is less than the first characteristic impedance in order to achieve proper scatter parameter alignment. The U-shaped segment may be generally formed thicker or wider than the linear segments to achieve a reduced characteristic impedance. In the alternative or in addition, co-planer ground metal is formed closer to the U-shaped segment to achieve a reduced characteristic impedance.
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公开(公告)号：US20210239754A1
公开(公告)日：2021-08-05
申请号：US17118828
申请日：2020-12-11
Applicant: NXP B.V.
Inventor： Jan-Peter Schat , Abdellatif Zanati , Henrik Asendorf , Maristella Spella , Waqas Hassan Syed , Giorgio Carluccio , Antonius Johannes Matheus de Graauw
IPC: G01R31/311
Abstract: A method of testing a semiconductor device. An apparatus comprising a semiconductor device and a test apparatus. The semiconductor device includes an integrated circuit and a plurality of external radiating elements at a surface of the device, the radiating elements include transmit elements and receive elements. The test apparatus includes a surface for placing against the surface of the device. The test apparatus also includes at least one waveguide, which extends through the test apparatus for routing electromagnetic radiation transmitted by one of the transmit elements of the device to one of the receive elements of the device. Each waveguide comprises a plurality of waveguide openings for coupling electromagnetically to corresponding radiating elements of the plurality of radiating elements located at the surface of the device. A spacing between the waveguide openings of each waveguide is larger than, or smaller than a spacing between the corresponding radiating elements.
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公开(公告)号：US11810875B2
公开(公告)日：2023-11-07
申请号：US17226376
申请日：2021-04-09
Applicant: NXP B.V.
IPC: H01L23/66 , G01S7/02 , G01S13/931 , H01L23/498 , H03H7/42
CPC classification number: H01L23/66 , G01S7/028 , G01S13/931 , H01L23/49816 , H03H7/42 , H01L2223/6616 , H01L2223/6638 , H01L2223/6677 , H01L2223/6683
Abstract: A packaged integrated circuit (IC) includes an IC die having first and second external contacts and a package substrate. The IC die is attached to the package substrate which includes a balun in a first metal layer. The balun is connected to the first and second external contacts of the IC die and to a first external contact of the package substrate. The first and second external contacts of the IC die communicate a differential signal with the package substrate, and the first external contact of the package substrate communicates a single-ended signal corresponding to the differential signal. Alternatively, the balun is connected to an external contact of the IC die and to first and second external contacts of the package substrate, in which the external contact of the IC die communicates a single-ended signal and the first and second external contacts of the package substrate communicate a differential signal.
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公开(公告)号：US20220328432A1
公开(公告)日：2022-10-13
申请号：US17226376
申请日：2021-04-09
Applicant: NXP B.V.
IPC: H01L23/66 , H01L23/498 , H03H7/42 , G01S7/02 , G01S13/931
Abstract: A packaged integrated circuit (IC) includes an IC die having first and second external contacts and a package substrate. The IC die is attached to the package substrate which includes a balun in a first metal layer. The balun is connected to the first and second external contacts of the IC die and to a first external contact of the package substrate. The first and second external contacts of the IC die communicate a differential signal with the package substrate, and the first external contact of the package substrate communicates a single-ended signal corresponding to the differential signal. Alternatively, the balun is connected to an external contact of the IC die and to first and second external contacts of the package substrate, in which the external contact of the IC die communicates a single-ended signal and the first and second external contacts of the package substrate communicate a differential signal.
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