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公开(公告)号:US20240014123A1
公开(公告)日:2024-01-11
申请号:US17810882
申请日:2022-07-06
Applicant: NXP B.V.
Inventor: Kuan-Hsiang Mao , Chin Teck Siong , Pey Fang Hiew , Wen Yuan Chuang , Sharon Huey Lin Tay , Wen Hung Huang
IPC: H01L23/498 , H01L23/00 , H01L21/48 , H01L23/367
CPC classification number: H01L23/49861 , H01L24/16 , H01L24/81 , H01L23/49838 , H01L21/4839 , H01L21/4882 , H01L23/3675 , H01L2224/81203 , H01L2224/81207 , H01L2224/16245 , H01L23/49816 , H01L25/105
Abstract: A method of forming a semiconductor device is provided. The method includes placing a semiconductor die and a leadframe on a carrier substrate. The semiconductor die includes a plurality of bond pads and the leadframe includes a plurality of leads. A first lead of the plurality of leads has a proximal end affixed to a first bond pad of the plurality of bond pads and a distal end placed on the carrier substrate. At least a portion of the semiconductor die and the leadframe is encapsulated with an encapsulant. The carrier substrate is separated from a first major side of the encapsulated semiconductor die and leadframe exposing a distal end portion of the first lead. A package substrate is applied on the first major side.
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公开(公告)号:US20230326821A1
公开(公告)日:2023-10-12
申请号:US17658611
申请日:2022-04-08
Applicant: NXP B.V.
Inventor: Kuan-Hsiang Mao , Wen Yuan Chuang , Wen Hung Huang
CPC classification number: H01L23/3128 , H01L21/565 , H01L21/568
Abstract: Five-side mold protection for semiconductor packages is described. In an illustrative, non-limiting embodiment, a semiconductor package may include: a substrate comprising a top surface, a bottom surface, and four sidewalls; an electrical component comprising a backside and a frontside, where the frontside of the electrical component is coupled to the top surface of the substrate; and a molding compound, where the molding compound encapsulates the backside of the electrical component and the four sidewalls of the substrate.
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公开(公告)号:US20240413192A1
公开(公告)日:2024-12-12
申请号:US18329847
申请日:2023-06-06
Applicant: NXP B.V.
Inventor: Paul Southworth , Michiel van Soestbergen , Amar Ashok Mavinkurve , Wen Yuan Chuang , Michael B. Vincent
IPC: H01L21/02
Abstract: A semiconductor device may include a semiconductor substrate and an isolation structure including a first dielectric layer formed over the semiconductor substrate, the first dielectric layer including one or more air gaps, and a first conductive structure formed on the dielectric layer, the conductive structure having a lower surface that faces the semiconductor substrate. Respective air gaps of the one or more air gaps of the first dielectric layer each may be disposed directly between corners of the lower surface of the conductive structure and the semiconductor substrate.
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