公开(公告)号：US06905928B2

公开(公告)日：2005-06-14

申请号：US10143192

申请日：2002-05-09

申请人： Naoki Kanda ,  Arito Ogawa ,  Eisuke Nishitani ,  Miwako Nakahara ,  Tadanori Yoshida ,  Kiyoshi Ogata

发明人： Naoki Kanda ,  Arito Ogawa ,  Eisuke Nishitani ,  Miwako Nakahara ,  Tadanori Yoshida ,  Kiyoshi Ogata

IPC分类号： H01L21/285 ,  H01L21/28 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78 ,  H01L21/336

CPC分类号： H01L21/823828 ,  H01L21/2807 ,  H01L21/823857

摘要： When polycrystalline silicon germanium film is used for gate electrodes in a MOS transistor apparatus, there have been problems of reduced reliability in the gate insulating film, due to stress in the silicon germanium grains. Therefore, a polysilicon germanium film is formed, after forming silicon fine particles of particle size 10 nm or less on an oxide film. As a result, it is possible to achieve a high-speed MOS transistor apparatus using an ultra-thin oxide film having a film thickness of 1.5 nm or less, wherein the Ge concentration of the polycrystalline silicon germanium at its interface with the oxide film is uniform, thereby reducing the stress in the film, and improving the reliability of the gate electrode.

公开(公告)号：US06870224B2

公开(公告)日：2005-03-22

申请号：US10641908

申请日：2003-08-15

申请人： Naoki Kanda ,  Arito Ogawa ,  Eisuke Nishitani ,  Miwako Nakahara ,  Tadanori Yoshida ,  Kiyoshi Ogata

发明人： Naoki Kanda ,  Arito Ogawa ,  Eisuke Nishitani ,  Miwako Nakahara ,  Tadanori Yoshida ,  Kiyoshi Ogata

IPC分类号： H01L21/285 ,  H01L21/28 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78 ,  H01L29/94

CPC分类号： H01L21/823828 ,  H01L21/2807 ,  H01L21/823857

摘要： When polycrystalline silicon germanium film is used for gate electrodes in a MOS transistor apparatus, there have been problems of reduced reliability in the gate insulating film, due to stress in the silicon germanium grains. Therefore, a polysilicon germanium film is formed, after forming silicon fine particles of particle size 10 nm or less on an oxide film. As a result, it is possible to achieve a high-speed MOS transistor apparatus using an ultra-thin oxide film having a film thickness of 1.5 nm or less, wherein the Ge concentration of the polycrystalline silicon germanium at its interface with the oxide film is uniform, thereby reducing the stress in the film, and improving the reliability of the gate electrode.

摘要翻译： 在多晶硅锗膜用于MOS晶体管装置中的栅电极时，由于硅锗颗粒中的应力，存在栅极绝缘膜的可靠性降低的问题。 因此，在氧化膜上形成粒径为10nm以下的硅微粒之后，形成多晶硅锗膜。 结果，可以实现使用膜厚度为1.5nm以下的超薄氧化膜的高速MOS晶体管装置，其中与氧化膜界面的多晶硅锗的Ge浓度为 均匀，从而降低膜中的应力，并提高栅电极的可靠性。

公开(公告)号：US08293257B2

公开(公告)日：2012-10-23

申请号：US13338780

申请日：2011-12-28

申请人： Kazunori Yagi ,  Naoki Kanda

发明人： Kazunori Yagi ,  Naoki Kanda

IPC分类号： A61K8/04 ,  A61K9/14 ,  A61K33/24 ,  A61K33/32 ,  A61K33/26 ,  A61K33/08 ,  A01N59/00 ,  A01N59/06 ,  A61K33/00

CPC分类号： A61K8/04 ,  A61K8/0241 ,  A61K8/19 ,  A61K8/31 ,  A61K8/37 ,  A61K2800/412 ,  A61K2800/612 ,  A61K2800/651

摘要： An oily dispersion of an inorganic microparticle oxide powder that exhibits excellent texture has superior compatibility with other cosmetic material components. The oily dispersion contains only two components of a dispersion medium and a surface-treated inorganic microparticle oxide powder, wherein the dispersion medium is an oil, the surface-treated inorganic microparticle oxide powder is a powder surface-treated with branched fatty acid containing isostearic acid as a primary constituent component or a metal salt containing isostearic acid as a primary constituent component at an amount of 1 to 30% by weight with respect to the powder as a base material, and the surface-treated inorganic microparticle oxide powder has a solid concentration of 25% by weight or more and a viscosity of 2,000 mPa·s or less at 25° C. in the preparation of the oily dispersion.

摘要翻译： 表现出优异织构的无机微粒氧化物粉末的油分散体与其它化妆品组分具有优异的相容性。 油性分散体仅含有分散介质和表面处理的无机微粒氧化物粉末的两种组分，其中分散介质为油，表面处理的无机微粒氧化物粉末是用含有异硬脂酸的支链脂肪酸表面处理的粉末 作为主要构成成分或以异硬脂酸为主要成分的金属盐，相对于作为基材的粉末为1〜30重量％，表面处理无机微粒氧化物粉末为固体成分浓度 在油性分散体的制备中，在25℃下为25重量％以上，粘度为2,000mPa·s以下。

公开(公告)号：US07614145B2

公开(公告)日：2009-11-10

申请号：US10487997

申请日：2002-09-04

申请人： Yasuhiro Wakizaka ,  Koichi Ikeda ,  Naoki Kanda

发明人： Yasuhiro Wakizaka ,  Koichi Ikeda ,  Naoki Kanda

IPC分类号： H05K3/38 ,  H05K3/46

CPC分类号： H05K3/389 ,  H05K3/388 ,  H05K3/4644 ,  H05K3/4661 ,  H05K2203/095 ,  H05K2203/124 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49156

摘要： A curable resin composition layer (3) containing an insulating resin and a curing agent is formed on the surface of an inner layer board having an electrical insulating layer (1) with a conductor circuit (2) formed on the surface, so as to cover said conductor circuit. A compound (4) having a structure capable of coordinating to metal atoms or metal ions is brought into contact with the surface of the curable resin composition layer. An electrical insulating layer (7) is formed by curing the curable resin composition layer. A metallic thin film layer (8) is formed on the surface of the electrical insulating layer. A conductor circuit (9) is formed on the surface of the electrical insulating layer utilizing the metallic thin film layer. A multilayer circuit board is manufactured through these steps.

摘要翻译： 在具有形成在表面上的导体电路（2）的具有电绝缘层（1）的内层板的表面上形成含有绝缘树脂和固化剂的固化性树脂组合物层（3），以覆盖 所述导体电路。 与能够与金属原子或金属离子配位的结构的化合物（4）与固化性树脂组合物层的表面接触。 通过固化可固化树脂组合物层形成电绝缘层（7）。 在电绝缘层的表面上形成金属薄膜层（8）。 使用金属薄膜层在电绝缘层的表面上形成导体电路（9）。 通过这些步骤制造多层电路板。

公开(公告)号：US06326512B1

公开(公告)日：2001-12-04

申请号：US09584747

申请日：2000-06-01

申请人： Masato Kitamura ,  Masahiro Yoshimura ,  Naoki Kanda ,  Ryoji Noyori

发明人： Masato Kitamura ,  Masahiro Yoshimura ,  Naoki Kanda ,  Ryoji Noyori

IPC分类号： C07C30900

CPC分类号： C07C303/22 ,  C07C303/32 ,  C07C309/24

摘要： Disclosed is a method of producing an optically active &bgr;-hydroxy sulfonic acid compound comprising hydrogenating a &bgr;-keto sulfonic acid compound represented by formula 1: where R1 represents an alkyl or a phenyl group, which may be substituted, and R2 represents sodium or an alkyl group, in an acidic solvent, in the presence of an asymmetric catalyst comprising a complex of bivalent Ru, having 2,2′-bis(diphenylphosphino)-1,1′-binaphthyl as a ligand, to produce a compound represented by formula 2: where R1 and R2 are as defined above, and * designates an asymmetric carbon atom.

摘要翻译： 公开了一种制备光学活性β-羟基磺酸化合物的方法，包括氢化由式1表示的β-酮磺酸化合物：其中R 1表示可被取代的烷基或苯基，R 2表示钠或 烷基，在酸性溶剂中，在包含具有2,2'-双（二苯基膦基）-1,1'-联萘作为配体的二价Ru的络合物的不对称催化剂的存在下，制备由式 2：其中R1和R2如上所定义，*表示不对称碳原子。

公开(公告)号：US06429476B2

公开(公告)日：2002-08-06

申请号：US09795190

申请日：2001-03-01

申请人： Masayuki Suzuki ,  Kentaro Yamada ,  Masashi Sahara ,  Takashi Nakajima ,  Naoki Kanda ,  Hidenori Suzuki ,  Yoshinori Matsumuro

发明人： Masayuki Suzuki ,  Kentaro Yamada ,  Masashi Sahara ,  Takashi Nakajima ,  Naoki Kanda ,  Hidenori Suzuki ,  Yoshinori Matsumuro

IPC分类号： H01L27108

CPC分类号： H01L27/10885 ,  H01L21/32051 ,  H01L21/76838 ,  H01L21/76897 ,  H01L27/10814 ,  H01L27/10888 ,  H01L27/10894 ,  H01L28/84 ,  H01L28/91

摘要： Bit lines BL of a DRAM that are narrowed to 0.1 &mgr;m or less are made of two-layered conductive films, in which a W (tungsten) film is deposited on a WN (tungsten nitride) film. For bit lines BL, fewer W atoms diffuse across the interface between the W film and the WN film, within crystal grains, and at grain boundaries of the W film, and no tensile stress exists in the W film. Therefore, high-temperature thermal processing in the capacitor formation process does not cause wiring breaks even when the width of the bit lines BL is narrowed to 0.1 &mgr;m or less.

摘要翻译： 变窄至0.1μm以下的DRAM的位线BL由在WN（氮化钨）膜上沉积W（钨）膜的两层导电膜构成。 对于位线BL，较少的W原子在W膜和WN膜之间的界面，晶粒内以及W膜的晶界之间扩散，并且在W膜中不存在拉伸应力。 因此，即使当位线BL的宽度变窄到0.1μm或更小时，电容器形成过程中的高温热处理也不会引起布线断裂。