公开(公告)号：US20230006538A1

公开(公告)日：2023-01-05

申请号：US17853743

申请日：2022-06-29

Applicant: Navitas Semiconductor Limited

Inventor： Songming Zhou ,  Tao Liu ,  Ruixia Fei ,  Victor Sinow

IPC: H02M1/08 ,  H03K17/06 ,  H02M3/335 ,  H03K17/687 ,  H02M1/44

Abstract: Turn-off circuits. In one aspect, the turn-off circuit includes a transistor having a gate terminal, a source terminal and a drain terminal, a first pull-down circuit connected to the gate terminal, a second pull-down circuit connected to the gate terminal, and a third pull-down circuit connected to the gate terminal. In another aspect, the first, the second and the third pull-down circuits are arranged to cause a turn off of the transistor by changing a voltage at the gate terminal at a first rate of voltage with respect to time from an on-state voltage to a first intermediate voltage, and from the first intermediate voltage to a second intermediate voltage at a second rate of voltage with respect to time, and from the second intermediate voltage to an off-state voltage at a third rate of voltage with respect to time, wherein the first rate is higher than the second rate.

公开(公告)号：US11594970B2

公开(公告)日：2023-02-28

申请号：US17575536

申请日：2022-01-13

Applicant: Navitas Semiconductor Limited

Inventor： Thomas Ribarich ,  Daniel M. Kinzer ,  Tao Liu ,  Marco Giandalia ,  Victor Sinow

IPC: G05F1/573 ,  G05F3/26 ,  H02M3/158 ,  H02M1/00

Abstract: A circuit is disclosed. The circuit includes a current detecting FET, configured to generate a current signal indicative of the value of the current flowing therethrough, an operational transconductance amplifier (OTA) configured to output a current in response to the voltage of the current signal, and a resistor configured to receive the current and to generate a voltage in response to the received current, where the generated voltage is indicative of the value of the current flowing through the current detecting FET. The current detecting FET is configured to become nonconductive in response to the generated voltage indicating that the current flowing through the current detecting FET is greater than a threshold.

公开(公告)号：US20210281189A1

公开(公告)日：2021-09-09

申请号：US17191451

申请日：2021-03-03

Applicant: Navitas Semiconductor Limited

Inventor： Marco Giandalia ,  Daniel M. Kinzer ,  Tao Liu

IPC: H02M7/219 ,  H02M1/08

Abstract: A circuit is disclosed. The circuit includes first, second third and fourth diodes connected to form a bridge rectification circuit having a pair of input terminals to receive an AC input signal and a pair of output terminals to deliver a rectified DC signal. The circuit also includes a first semiconductor switch coupled in parallel with the first diode, a second semiconductor switch coupled in parallel with the second diode, and a switch control circuit coupled to the pair of input terminals and arranged to selectively operate the first and second semiconductor switches using power from the AC input signal at the pair of input terminals.

公开(公告)号：US12126251B2

公开(公告)日：2024-10-22

申请号：US17853743

申请日：2022-06-29

Applicant: Navitas Semiconductor Limited

Inventor： Songming Zhou ,  Tao Liu ,  Ruixia Fei ,  Victor Sinow

IPC: H02M1/08 ,  H02M1/44 ,  H02M3/335 ,  H03K17/06 ,  H03K17/687

CPC classification number: H02M1/08 ,  H02M1/44 ,  H02M3/33507 ,  H03K17/06 ,  H03K17/687

Abstract: Turn-off circuits. In one aspect, the turn-off circuit includes a transistor having a gate terminal, a source terminal and a drain terminal, a first pull-down circuit connected to the gate terminal, a second pull-down circuit connected to the gate terminal, and a third pull-down circuit connected to the gate terminal. In another aspect, the first, the second and the third pull-down circuits are arranged to cause a turn off of the transistor by changing a voltage at the gate terminal at a first rate of voltage with respect to time from an on-state voltage to a first intermediate voltage, and from the first intermediate voltage to a second intermediate voltage at a second rate of voltage with respect to time, and from the second intermediate voltage to an off-state voltage at a third rate of voltage with respect to time, wherein the first rate is higher than the second rate.

公开(公告)号：US20240045454A1

公开(公告)日：2024-02-08

申请号：US18323330

申请日：2023-05-24

Applicant: Navitas Semiconductor Limited

Inventor： Songming Zhou ,  Tao Liu

IPC: G05F1/46 ,  G05F1/575 ,  G05F1/59

CPC classification number: G05F1/468 ,  G05F1/575 ,  G05F1/59

Abstract: Gallium nitride reference voltage generation circuits. In one aspect, the circuit includes a first gallium nitride (GaN)-based transistor having a first gate terminal, a first source terminal and a first drain terminal, a second GaN-based transistor having a second gate terminal, a second source terminal and a second drain terminal, the second gate terminal coupled to the first drain terminal, an input terminal coupled to the first gate terminal and arranged to receive a first voltage, an output terminal coupled to the second source terminal, a power supply terminal coupled to the first drain terminal and the second drain terminal, and a feedback circuit coupled between the first source terminal and the second source terminal, where the first source terminal is coupled to a ground through a first impedance element, the first impedance element having a positive temperature coefficient.

公开(公告)号：US20220231606A1

公开(公告)日：2022-07-21

申请号：US17575536

申请日：2022-01-13

Applicant: Navitas Semiconductor Limited

Inventor： Thomas Ribarich ,  Daniel M. Kinzer ,  Tao Liu ,  Marco Giandalia ,  Victor Sinow

IPC: H02M3/158 ,  H02M1/00

Abstract: A circuit is disclosed. The circuit includes a current detecting FET, configured to generate a current signal indicative of the value of the current flowing therethrough, an operational transconductance amplifier (OTA) configured to output a current in response to the voltage of the current signal, and a resistor configured to receive the current and to generate a voltage in response to the received current, where the generated voltage is indicative of the value of the current flowing through the current detecting FET. The current detecting FET is configured to become nonconductive in response to the generated voltage indicating that the current flowing through the current detecting FET is greater than a threshold.