公开(公告)号：US5680575A

公开(公告)日：1997-10-21

申请号：US443293

申请日：1995-05-17

申请人： Neil George Bartow ,  Robert Stanley Capowski ,  Louis Thomas Fasano ,  Thomas Anthony Gregg ,  Gregory Salyer ,  Douglas Wayne Westcott

发明人： Neil George Bartow ,  Robert Stanley Capowski ,  Louis Thomas Fasano ,  Thomas Anthony Gregg ,  Gregory Salyer ,  Douglas Wayne Westcott

IPC分类号： G06F13/12 ,  G06F15/17 ,  G06F15/173 ,  H04J3/06 ,  H04L7/10 ,  H04L29/06 ,  H04L29/08 ,  H04L29/14 ,  G06F13/14

CPC分类号： G06F13/122 ,  G06F15/17 ,  G06F15/17343 ,  H04J3/0629 ,  H04L29/06 ,  H04L69/40 ,  H04L7/10 ,  H04L69/14 ,  H04L69/323 ,  H04L69/324

摘要： A system for resetting a cache in a first device connected by a multilinelink to a memory in a second device. A transceiver in the first element connects to one end of each of the link lines and a transceiver in the second device connects to the other end. The transmitter in the first device transceiver is disabled in response to a failure of the transceiver to receive messages from the second device. The transmitter in the first device transceiver also selectively sends a reset sequence to the receiver in the second device. A detector detects when all of the receivers in the second device have either received a reset sequence or have detected that a transmitter in the first device is disabled. The detector sets a latch in response, representing that data in the second device cache is invalid. Optionally, the second device has responders which send responses over the link lines indicating receipt of a reset sequence. The transmitters in the first device switch to a disabled state when the responses are not received within a specified period.

摘要翻译： 一种用于将通过多连接器连接的第一设备中的高速缓存重置到第二设备中的存储器的系统。 第一元件中的收发器连接到每个链路线的一端，并且第二设备中的收发器连接到另一端。 第一设备收发器中的发射机响应于收发器从第二设备接收消息的故障被禁用。 第一设备收发器中的发射机还选择性地向第二设备中的接收机发送复位序列。 检测器检测到第二设备中的所有接收器何时已经接收到重置序列或检测到第一设备中的发射机被禁用。 检测器设置响应的锁存器，表示第二设备高速缓存中的数据无效。 可选地，第二设备具有通过链路线发送响应的响应器，指示接收到重置序列。 当在指定时间内没有收到响应时，第一个设备中的发射机切换到禁用状态。

公开(公告)号：US5651033A

公开(公告)日：1997-07-22

申请号：US480705

申请日：1995-06-07

申请人： Thomas Anthony Gregg ,  Robert Stanley Capowski ,  Daniel Francis Casper ,  Frank David Ferraiolo

发明人： Thomas Anthony Gregg ,  Robert Stanley Capowski ,  Daniel Francis Casper ,  Frank David Ferraiolo

IPC分类号： G06F13/42 ,  H04L7/00 ,  H04L7/02 ,  H04L7/033 ,  H04L7/04 ,  H04L12/56 ,  H04L25/14 ,  H04L25/49 ,  H04L29/06

CPC分类号： H04L29/06 ,  G06F13/4278 ,  H04L25/14 ,  H04L25/4908 ,  H04L7/041 ,  H04L2007/045 ,  H04L69/14 ,  H04L7/0008

摘要： A self-timed interface (STI) links two physically separated systems or nodes. A transmit state machine forms each word in a serial bit stream into a plurality of bytes and generates idle and data character sequences. Each byte is separately encoded in a run-length-limited code, along with its idle and data character sequences. Each of the plurality of bytes is transmitted on a separate conducting line along with a transmit clock signal that is also transmitted on a separate line. At the receiver, the data stream on each line is separately phase aligned with the clock, and bit aligned.

摘要翻译： 自定义接口（STI）链接两个物理上分离的系统或节点。 发送状态机将串行比特流中的每个单词形成多个字节，并生成空闲和数据字符序列。 每个字节分别以游程长度限制的代码及其空闲和数据字符序列编码。 多个字节中的每一个与分离的线路上发送的发送时钟信号一起在单独的导线上发送。 在接收机上，每行上的数据流与时钟分开相位对齐，并且位对齐。

公开(公告)号：US07428598B2

公开(公告)日：2008-09-23

申请号：US10718299

申请日：2003-11-20

申请人： Richard Louis Arndt ,  Bruce Leroy Beukema ,  David F. Craddock ,  Ronald Edward Fuhs ,  Thomas Anthony Gregg ,  Calvin Charles Paynton ,  Steven L. Rogers ,  Donald William Schmidt ,  Bruce Marshall Walk

发明人： Richard Louis Arndt ,  Bruce Leroy Beukema ,  David F. Craddock ,  Ronald Edward Fuhs ,  Thomas Anthony Gregg ,  Calvin Charles Paynton ,  Steven L. Rogers ,  Donald William Schmidt ,  Bruce Marshall Walk

IPC分类号： G06F15/16

CPC分类号： H04L49/35 ,  H04L12/18 ,  H04L49/358

摘要： A method, computer program product, and data processing system for providing system-area network (SAN) multicasting functionality in a logically partitioned (LPAR) data processing system in which a channel adapter is shared among a plurality of logical partitions is disclosed. A preferred embodiment of the present invention allows LPAR “hypervisor” firmware to assume the responsibility for multicast protocol handling and distribution of packets among logical partitions.

摘要翻译： 公开了一种在逻辑分区（LPAR）数据处理系统中提供系统区域网络（SAN）多播功能的方法，计算机程序产品和数据处理系统，其中在多个逻辑分区之间共享信道适配器。 本发明的优选实施例允许LPAR“管理程序”固件承担多播协议处理和逻辑分区之间的分组分发的责任。

公开(公告)号：US07010633B2

公开(公告)日：2006-03-07

申请号：US10411447

申请日：2003-04-10

申请人： Richard Louis Arndt ,  Bruce Leroy Beukema ,  David F. Craddock ,  Ronald Edward Fuhs ,  Thomas Anthony Gregg ,  Bruce Marshall Walk

发明人： Richard Louis Arndt ,  Bruce Leroy Beukema ,  David F. Craddock ,  Ronald Edward Fuhs ,  Thomas Anthony Gregg ,  Bruce Marshall Walk

IPC分类号： G06F13/14 ,  G06F15/173

CPC分类号： G06F12/1491

摘要： An apparatus, system and method for controlling access to facilities based on usage class of a requestor are provided. With the apparatus, system and method, a two level protection mechanism is provided for protecting host channel adapter (HCA) facilities from unauthorized access. With the present invention, a first level of access is provided through virtual address translation and a mechanism for determining if the requestor of access may access a system memory address space page associated with a real address to which the virtual address maps. A second level of access is provided through the allocation of usage classes and determining a required usage class for accessing an HCA facility.

摘要翻译： 提供了一种用于基于请求者的使用类来控制对设施的访问的装置，系统和方法。 利用设备，系统和方法，提供了一种保护主机通道适配器（HCA）设施免受未经授权访问的两级保护机制。 利用本发明，通过虚拟地址转换提供第一级别的访问，以及用于确定访问请求者是否可访问与虚拟地址映射到的实际地址相关联的系统存储器地址空间页面的机制。 通过分配使用类别并确定访问HCA设施所需的使用类别来提供第二级别的访问。

公开(公告)号：US06938138B2

公开(公告)日：2005-08-30

申请号：US09758788

申请日：2001-01-11

申请人： Bruce Leroy Beukema ,  David Craddock ,  Ronald Edward Fuhs ,  Thomas Anthony Gregg ,  Gregory Francis Pfister ,  Renato John Recio ,  Steven L. Rogers

发明人： Bruce Leroy Beukema ,  David Craddock ,  Ronald Edward Fuhs ,  Thomas Anthony Gregg ,  Gregory Francis Pfister ,  Renato John Recio ,  Steven L. Rogers

IPC分类号： G06F12/14 ,  G06F15/16

CPC分类号： G06F12/145

摘要： A method and apparatus for accessing a memory. Access rights for a memory operation are verified using a first data structure in response to receiving a request to perform the operation, wherein the request includes a virtual address for the operation. Responsive to access rights being verified for the memory operation, the virtual address translated into a real address using a second data structure.

摘要翻译： 一种访问存储器的方法和装置。 响应于接收到执行操作的请求，使用第一数据结构来验证存储器操作的访问权限，其中所述请求包括用于操作的虚拟地址。 响应于对存储器操作进行验证的访问权限，虚拟地址使用第二数据结构转换为实际地址。

公开(公告)号：US06725296B2

公开(公告)日：2004-04-20

申请号：US09915663

申请日：2001-07-26

申请人： David F. Craddock ,  Thomas Anthony Gregg ,  Ian David Judd ,  Gregory Francis Pfister ,  Renato John Recio ,  Donald William Schmidt

发明人： David F. Craddock ,  Thomas Anthony Gregg ,  Ian David Judd ,  Gregory Francis Pfister ,  Renato John Recio ,  Donald William Schmidt

IPC分类号： G06F300

CPC分类号： G06F9/4806

摘要： An apparatus and method for managing work and completion queues using head and tail circular pointers. With the apparatus and method, queue head and tail pointers are maintained in the channel interface and the host channel adapter. The head and tail pointers in the host channel adapter include a queue pointer table index and a queue page index for identifying a position within the queue. For work queues, the tail pointer in the channel interface is used to identify a next position where a work queue entry may be written. The head pointer in the channel interface is used only to determine whether the work queue is full or not. The head pointer in the host channel adapter is used to identify a next work queue entry for processing by the host channel adapter. The tail pointer in the host channel adapter is used by the host channel adapter to determine if the queue is empty. For completion queues, the head pointer in the channel interface is used to identify a next completion queue entry to be processed. The tail pointer in the host channel adapter is used to identify a next position in the completion queue to which the host channel adapter may post a completion queue entry.

摘要翻译： 一种使用头尾循环指针管理工作和完成队列的装置和方法。 使用设备和方法，在通道接口和主机通道适配器中维护队列头尾指针。 主机通道适配器中的头和尾指针包括队列指针表索引和用于标识队列中的位置的队列页索引。 对于工作队列，通道接口中的尾部指针用于标识可以写入工作队列条目的下一个位置。 通道接口中的头指针仅用于确定工作队列是否已满。 主机通道适配器中的头指针用于标识下一个工作队列条目以供主机通道适配器处理。 主机通道适配器中的尾部指针由主机通道适配器使用，以确定队列是否为空。 对于完成队列，通道接口中的头指针用于标识要处理的下一个完成队列条目。 主机通道适配器中的尾部指针用于标识完成队列中的下一个位置，主机通道适配器可以向其发布完成队列条目。

公开(公告)号：US07093024B2

公开(公告)日：2006-08-15

申请号：US09965005

申请日：2001-09-27

申请人： David F. Craddock ,  David Arlen Elko ,  Thomas Anthony Gregg ,  Gregory Francis Pfister ,  Renato John Recio ,  Donald William Schmidt

发明人： David F. Craddock ,  David Arlen Elko ,  Thomas Anthony Gregg ,  Gregory Francis Pfister ,  Renato John Recio ,  Donald William Schmidt

IPC分类号： G06F15/173

CPC分类号： H04L45/00 ,  H04L45/586

摘要： A mechanism for allowing a single physical IB node to virtualize a plurality of host channel adapters is provided. This includes providing the appearance of both a router and multiple virtual HCA's residing behind that router, to the external REAL subnet components. Each virtual host channel adapter will have unique access control levels. One or more InfiniBand subnets are virtualized in such a way that nodes residing both within the virtual subnets and in separate physical subnets are completely unaware of the virtualization. This virtualization of InfiniBand subnets significantly increases the horizontal scaling capabilities of a single InfiniBand physical component, while at the same time provides “native” network throughput for all the virtual hosts.

公开(公告)号：US06721335B1

公开(公告)日：2004-04-13

申请号：US09439012

申请日：1999-11-12

申请人： Thomas Anthony Gregg

发明人： Thomas Anthony Gregg

IPC分类号： H04L1256

CPC分类号： H04L12/40163 ,  H04L12/40032 ,  H04L12/407

摘要： Defines and handles segments in messages to place pauses and interruptions within the communication of a message between transmitted segments of the message. A common link switch is used in a network to connect links to all nodes, the segment structures in each message is preserved when packets of each message are passed within the switch to a switch transmitter connected to the destination node indicated in each packet of the message for transmitting each of the message segments. Each transmitter stores the source identifier of the first packet it transmits for a segment and then gives priority to transmitting packets which contain source and destination identifiers which match the current transmitter stored source identifier and match the destination node connected to the transmitter. This priority enables each switch transmitter to interleaves segments of concurrent messages while preserving the segmentation of transmitted packets to maintaining a maximum network communication rate for the messages. When an unexpected wait occurs within a transmitting segment, which exceeds a predetermined time-out period, a transmission of any other waiting segment is started, which improves the message transmission efficiency in the network.

摘要翻译： 定义和处理消息中的段，以在消息的传输段之间的消息通信中暂停和中断。 在网络中使用公共链路交换机将链路连接到所有节点，当每个消息的分组在交换机内传递到连接到消息的每个分组中指示的目的地节点的交换机发射机时，保留每个消息中的分段结构 用于发送每个消息段。 每个发射机存储其针对一个段发射的第一个分组的源标识符，然后优先发送包含与当前发射机存储的源标识符匹配的源和目的地标识符并且匹配连接到发射机的目的地节点的分组。 这个优先级使得每个交换机发送器能够交织并发消息的分段，同时保持所发送的分组的分段以维持消息的最大网络通信速率。 当在超过预定超时周期的发送段内发生意外等待时，任何其他等待段的发送开始，这提高了网络中的消息传输效率。

公开(公告)号：US06570885B1

公开(公告)日：2003-05-27

申请号：US09439011

申请日：1999-11-12

申请人： Thomas Anthony Gregg

发明人： Thomas Anthony Gregg

IPC分类号： H04L1254

CPC分类号： H04L47/6225 ,  G06F12/0813 ,  H04L47/10 ,  H04L47/19 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9057 ,  H04L49/9089

摘要： Defines and handles segments in messages to place pauses and interruptions within the communication of a message between transmitted segments of the message. A port cache of the destination node of each transmitted message obtains a message control block (MCB) which is used to control the reception of inbound segments within each message sent or received by the node. Each MCB stays in the cache only while its message is being communicated to the port and may be castout between segments in its message when there is no empty cache entry to receive a MCB for a current message being communicated but not having its MCB in the cache. Different types of dynamic priorities are written in status fields in each non-empty cache entry to enable a current cache entry to be castout when it is most likely to have the longest wait for being needed next in the cache for a segment communication to its message, which reduces cache castout thrashing to increase the average reception speed for communicating messages in the network. If a common link switch is used in a network to connect links to all nodes, the segment structures in each message is musts be preserved when packets of each message are passed through the switch to a destination node which uses the castout controlled communication cache taught herein.

摘要翻译： 定义和处理消息中的段，以在消息的传输段之间的消息通信中暂停和中断。 每个发送消息的目的地节点的端口高速缓存获得消息控制块（MCB），该消息控制块用于控制由节点发送或接收的每个消息内的入站段的接收。 每个MCB只有当其消息被传送到端口时才停留在缓存中，并且当没有空缓存条目来接收正在通信的当前消息的MCB但在高速缓存中没有其MCB时，可以在其消息中的段之间进行舍弃 。 不同类型的动态优先级被写入每个非空高速缓存条目中的状态字段中，以使当前缓存条目最有可能在高速缓存中需要等待下一次等待其消息的段通信时被抛出 ，这减少了高速缓存丢弃的抖动，以增加在网络中传达消息的平均接收速度。 如果在网络中使用公共链路交换机将链路连接到所有节点，则每个消息的分组必须被保留，每个消息的分组通过交换机传递到目的地节点，该目的节点使用本文中教导的控制通信缓存 。

公开(公告)号：US5948060A

公开(公告)日：1999-09-07

申请号：US788755

申请日：1997-01-24

申请人： Thomas Anthony Gregg ,  Kulwant Mundra Pandey

发明人： Thomas Anthony Gregg ,  Kulwant Mundra Pandey

IPC分类号： G06F15/16 ,  G06F15/163 ,  H04L12/56 ,  G06F13/00

CPC分类号： H04L49/9047 ,  H04L49/90 ,  H04L49/901

摘要： Speeds up a commanded system to read or write data for a large number of data frames transmitted on a link by executing a TRANSFER STRUCTURE instruction that automatically controls the reading or writing of a large number of scattered storage blocks in the storage of the commanded system containing, or to contain, the data transmitted on the link.

摘要翻译： 通过执行TRANSFER STRUCTURE指令来读取或写入大量数据帧的数据，加速指令系统读取或写入数据，该指令自动控制指令系统的存储中大量分散存储块的读取或写入， ，或包含在链路上发送的数据。