公开(公告)号：US20150188572A1

公开(公告)日：2015-07-02

申请号：US14143203

申请日：2013-12-30

Applicant: NetApp. Inc.

Inventor： Joshua Silberman

IPC: H03M13/15

CPC classification number: H03M13/1545

Abstract: Examples are disclosed for using or designing Chien search circuitry to locate errors for error correction code (ECC) encoded data. In some examples, an error locator polynomial (ELP) may be received that indicates a number of possible error locations for ECC encoded data. Chien search circuitry may be designed such that error locations are found based on the received ELP within one or more passes through the search circuitry. The design of the Chien search circuitry to accommodate both an average expected number of error locations for received ELPs and a worst case number of error locations for received ELPs. Other examples are described and claimed.

Abstract translation: 公开了使用或设计Chien搜索电路来定位纠错码（ECC）编码数据的错误的示例。 在一些示例中，可以接收指示ECC编码数据的可能错误位置的数量的错误定位多项式（ELP）。 可以设计Chien搜索电路，使得基于在通过搜索电路的一次或多次传递中接收到的ELP来找到错误位置。 Chien搜索电路的设计，以适应接收的ELP的平均预期错误位置数量和接收的ELP的最差情况数量的错误位置。 其他的例子被描述和要求保护。

公开(公告)号：US09455746B2

公开(公告)日：2016-09-27

申请号：US14143203

申请日：2013-12-30

Applicant: NetApp, Inc.

Inventor： Joshua Silberman

IPC: H03M13/00 ,  H03M13/15

CPC classification number: H03M13/1545

Abstract: Examples are disclosed for using or designing Chien search circuitry to locate errors for error correction code (ECC) encoded data. In some examples, an error locator polynomial (ELP) may be received that indicates a number of possible error locations for ECC encoded data. Chien search circuitry may be designed such that error locations are found based on the received ELP within one or more passes through the search circuitry. The design of the Chien search circuitry to accommodate both an average expected number of error locations for received ELPs and a worst case number of error locations for received ELPs. Other examples are described and claimed.

Abstract translation: 公开了使用或设计Chien搜索电路来定位纠错码（ECC）编码数据的错误的示例。 在一些示例中，可以接收指示ECC编码数据的可能错误位置的数量的错误定位多项式（ELP）。 可以设计Chien搜索电路，使得基于在通过搜索电路的一次或多次传递中接收到的ELP来找到错误位置。 Chien搜索电路的设计，以适应接收的ELP的平均预期错误位置数量和接收的ELP的最差情况数量的错误位置。 其他的例子被描述和要求保护。

公开(公告)号：US20150178150A1

公开(公告)日：2015-06-25

申请号：US14135663

申请日：2013-12-20

Applicant: NetApp, Inc.

Inventor： Joshua Silberman ,  George Totolos ,  Richard Strong

IPC: G06F11/10 ,  G11C29/42

CPC classification number: G11C29/42 ,  G06F11/1048 ,  G11C29/44 ,  G11C2029/0409 ,  G11C2029/0411

Abstract: Examples are disclosed for assessing pass/fail status of non-volatile memory. In some examples, information may be received to indicate a block having memory pages associated with non-volatile memory cells. The information may indicate at least some of the memory pages have bit errors in excess of an error correction code (ECC) ability to correct. For these examples, the block may be selected for read testing. Read testing may include programming the memory pages with a known pattern and waiting a period of time. Following the period of time each memory page may be read and if a resulting pattern read matches the known pattern programmed to each memory page, the memory page passes. The block may be taken offline if the number of passing memory pages is below a pass threshold number. Other examples are described and claimed.

Abstract translation: 公开了用于评估非易失性存储器的通过/失败状态的示例。 在一些示例中，可以接收信息以指示具有与非易失性存储器单元相关联的存储器页的块。 该信息可以指示至少一些存储器页面具有超过纠错码（ECC）校正能力的位错误。 对于这些示例，可以选择该块用于读取测试。 读取测试可能包括使用已知模式对内存页进行编程，并等待一段时间。 在每个存储器页面可以被读取的时间段之后，如果所得到的模式读取与编程到每个存储器页面的已知模式匹配，则存储器页面通过。 如果通过的存储器页面的数量低于通过阈值数量，则该块可以被脱机。 其他的例子被描述和要求保护。

公开(公告)号：US09454206B2

公开(公告)日：2016-09-27

申请号：US14143130

申请日：2013-12-30

Applicant: NetApp, Inc.

Inventor： David Robles ,  George Totolos ,  Joshua Silberman

IPC: G06F1/32

CPC classification number: G06F1/3206 ,  G06F1/32 ,  G06F1/3225 ,  G06F1/3275 ,  Y02D10/13 ,  Y02D10/14

Abstract: Improved power management techniques for computer-readable storage devices are described. In one embodiment, for example, an apparatus may comprise a plurality of logical storage devices and a controller to manage operations of the plurality of logical storage devices, the controller comprising a configuration component to configure a global power consumption threshold defining an overall power consumption budget for the plurality of logical storage devices, a tracking component to maintain a global power consumption tally comprising an estimated total power consumption level for the plurality of logical storage devices, and an arbitration component to resolve an operation request based on the global power consumption threshold and the global power consumption tally. Other embodiments are described and claimed.

Abstract translation: 描述了用于计算机可读存储设备的改进的功率管理技术。 在一个实施例中，例如，设备可以包括多个逻辑存储设备和用于管理多个逻辑存储设备的操作的控制器，所述控制器包括配置组件以配置定义总体功耗预算的全局功耗阈值 对于多个逻辑存储设备，跟踪组件维持包括多个逻辑存储设备的估计总功耗级别的全局功耗计数，以及基于全局功耗阈值解决操作请求的仲裁组件，以及 全球功耗统计。 描述和要求保护其他实施例。

公开(公告)号：US09305663B2

公开(公告)日：2016-04-05

申请号：US14135663

申请日：2013-12-20

Applicant: NetApp, Inc.

Inventor： Joshua Silberman ,  George Totolos ,  Richard Strong

IPC: G11C29/42 ,  G11C29/44 ,  G11C29/04 ,  G06F11/10

CPC classification number: G11C29/42 ,  G06F11/1048 ,  G11C29/44 ,  G11C2029/0409 ,  G11C2029/0411

Abstract: Examples are disclosed for assessing pass/fail status of non-volatile memory. In some examples, information may be received to indicate a block having memory pages associated with non-volatile memory cells. The information may indicate at least some of the memory pages have bit errors in excess of an error correction code (ECC) ability to correct. For these examples, the block may be selected for read testing. Read testing may include programming the memory pages with a known pattern and waiting a period of time. Following the period of time each memory page may be read and if a resulting pattern read matches the known pattern programmed to each memory page, the memory page passes. The block may be taken offline if the number of passing memory pages is below a pass threshold number. Other examples are described and claimed.

Abstract translation: 公开了用于评估非易失性存储器的通过/失败状态的示例。 在一些示例中，可以接收信息以指示具有与非易失性存储器单元相关联的存储器页的块。 该信息可以指示至少一些存储器页面具有超过纠错码（ECC）校正能力的位错误。 对于这些示例，可以选择该块用于读取测试。 读取测试可能包括使用已知模式对内存页进行编程，并等待一段时间。 在每个存储器页面可以被读取的时间段之后，如果所得到的模式读取与编程到每个存储器页面的已知模式匹配，则存储器页面通过。 如果通过的存储器页面的数量低于通过阈值数量，则该块可以被脱机。 其他的例子被描述和要求保护。

公开(公告)号：US20150185799A1

公开(公告)日：2015-07-02

申请号：US14143130

申请日：2013-12-30

Applicant: NetApp, Inc.

Inventor： David Robles ,  George Totolos ,  Joshua Silberman

IPC: G06F1/32

CPC classification number: G06F1/3206 ,  G06F1/32 ,  G06F1/3225 ,  G06F1/3275 ,  Y02D10/13 ,  Y02D10/14

Abstract: Improved power management techniques for computer-readable storage devices are described. In one embodiment, for example, an apparatus may comprise a plurality of logical storage devices and a controller to manage operations of the plurality of logical storage devices, the controller comprising a configuration component to configure a global power consumption threshold defining an overall power consumption budget for the plurality of logical storage devices, a tracking component to maintain a global power consumption tally comprising an estimated total power consumption level for the plurality of logical storage devices, and an arbitration component to resolve an operation request based on the global power consumption threshold and the global power consumption tally. Other embodiments are described and claimed.

Abstract translation: 描述了用于计算机可读存储设备的改进的功率管理技术。 在一个实施例中，例如，设备可以包括多个逻辑存储设备和用于管理多个逻辑存储设备的操作的控制器，所述控制器包括配置组件以配置定义总体功耗预算的全局功耗阈值 对于多个逻辑存储设备，跟踪组件维持包括多个逻辑存储设备的估计总功耗级别的全局功耗计数，以及基于全局功耗阈值解决操作请求的仲裁组件，以及 全球功耗统计。 描述和要求保护其他实施例。