公开(公告)号：US09292380B2

公开(公告)日：2016-03-22

申请号：US14246140

申请日：2014-04-06

申请人： Nitin Singh ,  Gaurav Jain ,  Amit Jindal ,  Rohit Tomar

发明人： Nitin Singh ,  Gaurav Jain ,  Amit Jindal ,  Rohit Tomar

IPC分类号： G06F11/10 ,  G06F12/06 ,  G06F13/40 ,  G06F11/14 ,  G06F11/16

CPC分类号： G06F11/1016 ,  G06F11/1415 ,  G06F11/165 ,  G06F12/063 ,  G06F13/4022 ,  G06F2212/206

摘要： Hardware processors in an SOC integrated circuit logically swapping memories by remapping memory addresses, including tightly coupled and local memories, to enable a sequence of data-processing algorithms to execute more quickly by different hardware processors without having to copy the data between different memories using a relatively slow data crossbar switch. When a memory stores error-correction code (ECC) address information linking stored ECC data with stored user data, the hardware processor dynamically remaps the ECC address information, as needed.

摘要翻译： SOC集成电路中的硬件处理器通过重映射存储器地址（包括紧密耦合和本地存储器）来重新映射存储器来逻辑地交换存储器，以使得一系列数据处理算法能够由不同的硬件处理器更快地执行，而不必使用 相对较慢的数据交叉开关。 当存储器存储将存储的ECC数据与存储的用户数据相链接的纠错码（ECC）地址信息时，硬件处理器根据需要动态重映射ECC地址信息。

公开(公告)号：US20150286525A1

公开(公告)日：2015-10-08

申请号：US14246140

申请日：2014-04-06

申请人： Nitin Singh ,  Gaurav Jain ,  Amit Jindal ,  Rohit Tomar

发明人： Nitin Singh ,  Gaurav Jain ,  Amit Jindal ,  Rohit Tomar

IPC分类号： G06F11/10 ,  G06F11/16 ,  G06F13/40 ,  G06F11/14 ,  G11C11/406 ,  G06F12/06

CPC分类号： G06F11/1016 ,  G06F11/1415 ,  G06F11/165 ,  G06F12/063 ,  G06F13/4022 ,  G06F2212/206

摘要： Hardware processors in an SOC integrated circuit logically swapping memories by remapping memory addresses, including tightly coupled and local memories, to enable a sequence of data-processing algorithms to execute more quickly by different hardware processors without having to copy the data between different memories using a relatively slow data crossbar switch. When a memory stores error-correction code (ECC) address information linking stored ECC data with stored user data, the hardware processor dynamically remaps the ECC address information, as needed.

摘要翻译： SOC集成电路中的硬件处理器通过重映射存储器地址（包括紧密耦合和本地存储器）来重新映射存储器来逻辑地交换存储器，以使得一系列数据处理算法能够由不同的硬件处理器更快地执行，而不必使用 相对较慢的数据交叉开关。 当存储器存储将存储的ECC数据与存储的用户数据相链接的纠错码（ECC）地址信息时，硬件处理器根据需要动态重映射ECC地址信息。

公开(公告)号：US09031736B2

公开(公告)日：2015-05-12

申请号：US14150738

申请日：2014-01-08

申请人： Rohit Tomar ,  Prashant Bhargava ,  Neha Jain ,  Matthew B. Ruff

发明人： Rohit Tomar ,  Prashant Bhargava ,  Neha Jain ,  Matthew B. Ruff

IPC分类号： G06F7/00 ,  G07C5/00 ,  G01P15/125 ,  H02M1/36 ,  H04L7/04

CPC分类号： G07C5/00 ,  G01P15/125 ,  H02M1/36 ,  H04L7/044

摘要： A system for performing diagnostic checks on a data message transmitted from a sensor and received by a receiver includes a receiver clock tick counter, a prescaler counter, a calibration pulse detector, a nibble counter, and a calculator. The system receives first and second data messages transmitted from the sensor. Pulse widths of first and second calibration pulses of the first and second data messages, respectively, and lengths of the first and second data messages are measured using the receiver clock tick, prescaler, and nibble counters based on a compensated receiver clock signal. Thereafter, the pulse widths of the first and second calibration pulses and the lengths of the first and second data messages are compared using the calculator to perform the diagnostic checks.

摘要翻译： 用于对从传感器发送并由接收器接收的数据消息进行诊断检查的系统包括接收机时钟计数器，预分频器计数器，校准脉冲检测器，半字节计数器和计算器。 系统接收从传感器发送的第一和第二数据消息。 第一和第二数据消息的第一和第二校准脉冲的分别为第一和第二数据消息的长度的脉冲宽度使用接收器时钟tick，预分频器和半字节计数器基于经补偿的接收机时钟信号来测量。 此后，使用计算器比较第一和第二校准脉冲的脉冲宽度以及第一和第二数据消息的长度以执行诊断检查。

公开(公告)号：US20130345924A1

公开(公告)日：2013-12-26

申请号：US13530085

申请日：2012-06-21

申请人： Rohit Tomar ,  Prashant Bhargava ,  Neha Jain ,  Matthew B. Ruff

发明人： Rohit Tomar ,  Prashant Bhargava ,  Neha Jain ,  Matthew B. Ruff

IPC分类号： G06F19/00 ,  H04B17/00

CPC分类号： G07C5/00 ,  G01P15/125 ,  H02M1/36 ,  H04L7/044

摘要： A system for performing diagnostic checks on a data message transmitted from a sensor and received by a receiver includes a receiver clock tick counter, a prescaler counter, a calibration pulse detector, a nibble counter, and a calculator. The system receives first and second data messages transmitted from the sensor. Pulse widths of first and second calibration pulses of the first and second data messages, respectively, and lengths of the first and second data messages are measured using the receiver clock tick, prescaler, and nibble counters based on a compensated receiver clock signal. Thereafter, the pulse widths of the first and second calibration pulses and the lengths of the first and second data messages are compared using the calculator to perform the diagnostic checks.

摘要翻译： 用于对从传感器发送并由接收器接收的数据消息进行诊断检查的系统包括接收机时钟计数器，预分频器计数器，校准脉冲检测器，半字节计数器和计算器。 系统接收从传感器发送的第一和第二数据消息。 第一和第二数据消息的第一和第二校准脉冲的分别为第一和第二数据消息的长度的脉冲宽度使用接收器时钟tick，预分频器和半字节计数器基于经补偿的接收机时钟信号来测量。 此后，使用计算器比较第一和第二校准脉冲的脉冲宽度以及第一和第二数据消息的长度以执行诊断检查。

公开(公告)号：US20140121886A1

公开(公告)日：2014-05-01

申请号：US14150738

申请日：2014-01-08

申请人： Rohit Tomar ,  Prashant Bhargava ,  Neha Jain ,  Matthew B. Ruff

发明人： Rohit Tomar ,  Prashant Bhargava ,  Neha Jain ,  Matthew B. Ruff

IPC分类号： G07C5/00

CPC分类号： G07C5/00 ,  G01P15/125 ,  H02M1/36 ,  H04L7/044

摘要： A system for performing diagnostic checks on a data message transmitted from a sensor and received by a receiver includes a receiver clock tick counter, a prescaler counter, a calibration pulse detector, a nibble counter, and a calculator. The system receives first and second data messages transmitted from the sensor. Pulse widths of first and second calibration pulses of the first and second data messages, respectively, and lengths of the first and second data messages are measured using the receiver clock tick, prescaler, and nibble counters based on a compensated receiver clock signal. Thereafter, the pulse widths of the first and second calibration pulses and the lengths of the first and second data messages are compared using the calculator to perform the diagnostic checks.

摘要翻译： 用于对从传感器发送并由接收器接收的数据消息进行诊断检查的系统包括接收机时钟计数器，预分频器计数器，校准脉冲检测器，半字节计数器和计算器。 系统接收从传感器发送的第一和第二数据消息。 第一和第二数据消息的第一和第二校准脉冲的分别为第一和第二数据消息的长度的脉冲宽度使用接收器时钟tick，预分频器和半字节计数器基于经补偿的接收机时钟信号来测量。 此后，使用计算器比较第一和第二校准脉冲的脉冲宽度以及第一和第二数据消息的长度以执行诊断检查。

公开(公告)号：US08645020B2

公开(公告)日：2014-02-04

申请号：US13530085

申请日：2012-06-21

申请人： Rohit Tomar ,  Prashant Bhargava ,  Neha Jain ,  Matthew B. Ruff

发明人： Rohit Tomar ,  Prashant Bhargava ,  Neha Jain ,  Matthew B. Ruff

IPC分类号： G01M17/00

CPC分类号： G07C5/00 ,  G01P15/125 ,  H02M1/36 ,  H04L7/044

摘要： A system for performing diagnostic checks on a data message transmitted from a sensor and received by a receiver includes a receiver clock tick counter, a prescaler counter, a calibration pulse detector, a nibble counter, and a calculator. The system receives first and second data messages transmitted from the sensor. Pulse widths of first and second calibration pulses of the first and second data messages, respectively, and lengths of the first and second data messages are measured using the receiver clock tick, prescaler, and nibble counters based on a compensated receiver clock signal. Thereafter, the pulse widths of the first and second calibration pulses and the lengths of the first and second data messages are compared using the calculator to perform the diagnostic checks.

摘要翻译： 用于对从传感器发送并由接收器接收的数据消息进行诊断检查的系统包括接收机时钟计数器，预分频器计数器，校准脉冲检测器，半字节计数器和计算器。 系统接收从传感器发送的第一和第二数据消息。 第一和第二数据消息的第一和第二校准脉冲的分别为第一和第二数据消息的长度的脉冲宽度使用接收器时钟tick，预分频器和半字节计数器基于经补偿的接收机时钟信号来测量。 此后，使用计算器比较第一和第二校准脉冲的脉冲宽度以及第一和第二数据消息的长度以执行诊断检查。

公开(公告)号：US20120195400A1

公开(公告)日：2012-08-02

申请号：US13020815

申请日：2011-02-04

申请人： Rohit Tomar ,  Prashant Bhargave

发明人： Rohit Tomar ,  Prashant Bhargave

IPC分类号： H04L7/00

CPC分类号： H04L7/0331 ,  H04L7/044

摘要： A method and system for estimating and compensating for variation between a receiver clock and a transmitter clock, where a receiver utilizes a high frequency clock signal to generate a receiver clock and then adjusts the receiver clock to compensate for variations between the receiver and transmitter clocks. The adjusted receiver clock is used to sample nibble pulses in a received data frame. Counter based compensation of the receiver clock eliminates the need for the receiver to perform floating point calculations, improves the accuracy of nibble pulse sampling and also reduces area and power consumption of the device.

摘要翻译： 一种用于估计和补偿接收机时钟和发射机时钟之间的变化的方法和系统，其中接收机利用高频时钟信号来产生接收机时钟，然后调整接收机时钟以补偿接收机和发射机时钟之间的变化。 经调整的接收机时钟用于对接收到的数据帧中的半字节进行采样。 接收机时钟的基于计数器的补偿消除了接收机执行浮点计算的需要，提高了半字节脉冲采样的精度，并且还减少了器件的面积和功耗。

公开(公告)号：US10282387B2

公开(公告)日：2019-05-07

申请号：US15034622

申请日：2013-11-06

申请人： Maik Brett ,  Navdeep Singh Gill ,  Rohit Tomar

发明人： Maik Brett ,  Navdeep Singh Gill ,  Rohit Tomar

IPC分类号： G06F17/14

摘要： An FFT device for performing a Fast Fourier Transform (FFT) of an operand vector of length N is described. The FFT device comprises a control unit, a coefficient unit, and a transformation unit. The control unit controls a sequence of transformation rounds, the transformation rounds including two or more FFT rounds and further including or not including a window round. The control unit also maintains configuration data indicating for each of said transformation rounds whether the respective transformation round is an FFT round, a window-FFT round, or a window round. The coefficient unit provides transformation data. The transformation unit is arranged to receive the transformation data and to perform the respective linear transformation on the basis of the transformation data. A method for performing a Fast Fourier Transform is described as well.

公开(公告)号：US09740663B2

公开(公告)日：2017-08-22

申请号：US14283918

申请日：2014-05-21

申请人： Rohit Tomar ,  Maik Brett ,  Tejbal Prasad ,  Gurinder Singh

发明人： Rohit Tomar ,  Maik Brett ,  Tejbal Prasad ,  Gurinder Singh

IPC分类号： G06F17/14

CPC分类号： G06F17/142

摘要： A data processing device and a method for performing second or next stage of an N point Fast Fourier Transform is suggested. The processing device comprises an input operand memory unit and an input buffer comprising a plurality of addressable memory cells arranged in lines and columns. Furthermore, the device comprises a number of radix-P operation units for producing output operands that are buffered in an output buffer. Input operands are read from the input operand memory unit and buffering into the input buffer. The input operands are stored and fetched from the input buffer according to a reordering scheme that allows efficient parallel processing of the operands by the butterflies and the buffering of subsequent input operands.

公开(公告)号：US08447004B2

公开(公告)日：2013-05-21

申请号：US13020815

申请日：2011-02-04

申请人： Rohit Tomar ,  Prashant Bhargava

发明人： Rohit Tomar ,  Prashant Bhargava

IPC分类号： H04L7/00

CPC分类号： H04L7/0331 ,  H04L7/044

摘要： A method and system for estimating and compensating for variation between a receiver clock and a transmitter clock, where a receiver utilizes a high frequency clock signal to generate a receiver clock and then adjusts the receiver clock to compensate for variations between the receiver and transmitter clocks. The adjusted receiver clock is used to sample nibble pulses in a received data frame. Counter based compensation of the receiver clock eliminates the need for the receiver to perform floating point calculations, improves the accuracy of nibble pulse sampling and also reduces area and power consumption of the device.

摘要翻译： 一种用于估计和补偿接收机时钟和发射机时钟之间的变化的方法和系统，其中接收机利用高频时钟信号来产生接收机时钟，然后调整接收机时钟以补偿接收机和发射机时钟之间的变化。 经调整的接收机时钟用于对接收到的数据帧中的半字节进行采样。 接收机时钟的基于计数器的补偿消除了接收机执行浮点计算的需要，提高了半字节脉冲采样的精度，并且还减少了器件的面积和功耗。