公开(公告)号：US5824829A

公开(公告)日：1998-10-20

申请号：US861922

申请日：1997-05-22

申请人： Noriaki Maeda ,  Toru Taguchi ,  Seiji Tanizaki ,  Nobumitsu Kumazawa ,  Yutaka Takeuchi

发明人： Noriaki Maeda ,  Toru Taguchi ,  Seiji Tanizaki ,  Nobumitsu Kumazawa ,  Yutaka Takeuchi

IPC分类号： C07C7/20 ,  C09K3/00 ,  C10G75/00

CPC分类号： C07C7/20 ,  C09K3/00 ,  C10G75/00

摘要： An inhibitor to suppress or inhibit the viscosity increase of a hydrocarbon, e.g. in a bottom section of an oil quench tower, featuring the use of a sulfonic acid and/or its salt as an effective inhibitor composition, which may optionally contain a polymerization inhibitor including one or more inhibitors selected from the group of aromatic amines, phenols and dialkyl hydroxyl amines. Furthermore, the method to inhibit the increasing viscosity of hydrocarbon, e.g. in a bottom section of a tower, may be accomplished by adding the hydrocarbon viscosity inhibitor to the feed oil, reflux oil or directly to the tower bottom oil in the tower. Such an oil quench tower is used for an olefin production process in which the hydrocarbon may include naphtha, light oil, natural gas, liquefied natural gas, etc. in the raw material.

摘要翻译： 抑制或抑制烃的粘度增加的抑制剂，例如 在油淬火塔的底部部分中，特征在于使用磺酸和/或其盐作为有效的抑制剂组合物，其可以任选地含有包含一种或多种选自芳族胺，酚和酚类的抑制剂的聚合抑制剂， 二烷基羟胺。 此外，抑制烃的粘度增加的方法，例如， 在塔的底部可以通过将烃粘度抑制剂加入到原料油，回流油中或直接加入塔中的塔底油来实现。 这种油淬火塔用于烯烃生产过程，其中烃可以包括原料中的石脑油，轻油，天然气，液化天然气等。

公开(公告)号：US08643116B2

公开(公告)日：2014-02-04

申请号：US13606583

申请日：2012-09-07

申请人： Noriaki Maeda

发明人： Noriaki Maeda

IPC分类号： H01L27/092

CPC分类号： H01L27/088 ,  G11C11/412 ,  H01L27/0207 ,  H01L27/092 ,  H01L27/1104

摘要： A semiconductor device includes a first MISFET and a second MISFET which are formed over a semiconductor substrate and have the same conductive type. The first MISFET has a first gate insulating film arranged over the semiconductor substrate, a first gate electrode arranged over the first gate insulating film, and a first source region and a first drain region. The second MISFET has a second gate insulating film arranged over the semiconductor substrate, a second gate electrode arranged over the second gate insulating film, and a second source region and a second drain region. The first and the second gate electrode are electrically coupled, the first and the second source region are electrically coupled, and the first and the second drain region are electrically coupled. Accordingly, the first and the second MISFET are coupled in parallel. In addition, threshold voltages are different between the first and the second MISFET.

摘要翻译： 半导体器件包括形成在半导体衬底上并且具有相同导电类型的第一MISFET和第二MISFET。 第一MISFET具有布置在半导体衬底上的第一栅极绝缘膜，布置在第一栅极绝缘膜上的第一栅极，以及第一源极区域和第一漏极区域。 第二MISFET具有布置在半导体衬底上的第二栅极绝缘膜，布置在第二栅极绝缘膜上的第二栅极电极和第二源极区域和第二漏极区域。 第一和第二栅极电耦合，第一和第二源极区域电耦合，并且第一和第二漏极区域电耦合。 因此，第一和第二MISFET并联耦合。 此外，第一和第二MISFET之间的阈值电压是不同的。

公开(公告)号：US20060274571A1

公开(公告)日：2006-12-07

申请号：US11504077

申请日：2006-08-15

申请人： Noriaki Maeda ,  Yoshihiro Shinozaki ,  Masanao Yamaoka ,  Yasuhisa Shimazaki ,  Masanori Isoda ,  Koji Nii

发明人： Noriaki Maeda ,  Yoshihiro Shinozaki ,  Masanao Yamaoka ,  Yasuhisa Shimazaki ,  Masanori Isoda ,  Koji Nii

IPC分类号： G11C11/00

CPC分类号： G11C11/412 ,  G11C5/063 ,  G11C5/14 ,  G11C11/419 ,  H01L27/11 ,  H01L27/1104

摘要： The invention provides a semiconductor integrated circuit device provided with an SRAM that satisfies the requirements for both the SNM and the write margin with a low supply voltage. The semiconductor integrated circuit device include: multiple static memory cells provided in correspondence with multiple word lines and multiple complimentary bit lines; multiple memory cell power supply lines that each supply an operational voltage to each of the multiple memory cells connected to the multiple complimentary bit lines each; multiple power supply circuits comprised of resistive units that each supply a power supply voltage to the memory cell power supply lines each; and a pre-charge circuit that supplies a pre-charge voltage corresponding to the power supply voltage to the complimentary bit lines, wherein the memory cell power supply lines are made to have coupling capacitances to thereby transmit a write signal on corresponding complimentary bit lines.

公开(公告)号：US07021411B2

公开(公告)日：2006-04-04

申请号：US10378208

申请日：2003-03-03

申请人： Noriaki Maeda ,  Ikuo Ozawa ,  Toshiki Sugiyama

发明人： Noriaki Maeda ,  Ikuo Ozawa ,  Toshiki Sugiyama

IPC分类号： B60K11/04

CPC分类号： B60K11/04 ,  B62D25/084

摘要： A clearance 44 is provided between the outer periphery of a duct 42 and a vehicle body, that is, a radiator support 50 and, at the same time, the clearance 44 is made to have a labyrinth structure. In this structure, it is possible to prevent vibrations of the vehicle body from being propagated from the radiator support 50 to the duct 42 while preventing a current of air, such as one caused by movement of the vehicle, from flowing around heat exchangers, such as a radiator 10, and flowing downstream through the clearance 44. Therefore, it is possible to improve the cooling performance of heat exchangers such as the radiator 10 while preventing the duct 42, that is, a duct shroud 40 from being damaged by vibration.

公开(公告)号：US06708790B2

公开(公告)日：2004-03-23

申请号：US10132495

申请日：2002-04-25

申请人： Ikuo Ozawa ,  Toshiki Sugiyama ,  Norihisa Sasano ,  Noriaki Maeda ,  Kazuaki Kafuku ,  Harumi Okai ,  Yasuhiko Itou ,  Tomoyuki Hatano ,  Hiromi Takagi ,  Takeshi Nagasaka ,  Yasushi Hibi

发明人： Ikuo Ozawa ,  Toshiki Sugiyama ,  Norihisa Sasano ,  Noriaki Maeda ,  Kazuaki Kafuku ,  Harumi Okai ,  Yasuhiko Itou ,  Tomoyuki Hatano ,  Hiromi Takagi ,  Takeshi Nagasaka ,  Yasushi Hibi

IPC分类号： B60K1104

CPC分类号： F04D29/582 ,  B60K11/04 ,  B62D25/084 ,  F01P2005/025

摘要： A front-end structure comprising a panel body (400) to which a center member (500), being fixed to a body of a vehicle at a front end of the vehicle and supporting, at least, a driving engine (E/G), is joined, wherein the panel body (400) is molded out of aluminum by die-casting and a joining section (421) of the panel body (400) to which the center member (500) is joined has a mechanical strength higher than that of any other sections of the panel body (400) near the joining section (421) except the joining section (421).

摘要翻译： 一种前端结构，包括面板主体（400），中心构件（500）至少固定在车辆的前端处的车辆本体上，并至少支撑驱动发动机（E / G） ，其中，所述面板体（400）通过压铸成型为铝，并且所述面板体（400）的与所述中心构件（500）接合的接合部（421）的机械强度高于 除了接合部分（421）之外的接合部分（421）附近的面板主体（400）的任何其它部分的部分。

公开(公告)号：US06540037B2

公开(公告)日：2003-04-01

申请号：US09769933

申请日：2001-01-25

申请人： Norihisa Sasano ,  Noriaki Maeda ,  Ikuo Ozawa ,  Toshiki Sugiyama

发明人： Norihisa Sasano ,  Noriaki Maeda ,  Ikuo Ozawa ,  Toshiki Sugiyama

IPC分类号： B60K1100

CPC分类号： B62D25/084 ,  B60K11/04 ,  B60K11/08 ,  F01P2070/52

摘要： In a vehicle front end panel to which a front end member including at least a radiator is assembled, an air guiding portion for guiding air into the radiator is provided integrally with a body panel portion, and a low strength portion having a mechanical strength lower than that of the panel body portion is provided in the air guiding portion. Accordingly, during a minor vehicle collision, the low strength portion of the air guiding portion is preferentially broken to absorb a collision energy. Thus, collision force applied to the panel body portion can be reduced, and it can prevent the panel body portion from being broken during the minor vehicle collision.

摘要翻译： 在组装有至少包括散热器的前端构件的车辆前端面板中，将空气引导到散热器中的空气引导部分与主体板部分一体地设置，并且具有低于机械强度的低强度部分 面板主体部分的设置在空气引导部分中。 因此，在轻微的车辆碰撞期间，空气引导部分的低强度部分被优先断开以吸收碰撞能量。 因此，可以减小施加到面板主体部分的碰撞力，并且可以防止在小型车辆碰撞期间面板本体部分被破坏。

公开(公告)号：US06364403B1

公开(公告)日：2002-04-02

申请号：US09692429

申请日：2000-10-19

申请人： Ikuo Ozawa ,  Noriaki Maeda ,  Takuya Usami ,  Toshiki Sugiyama ,  Norihisa Sasano

发明人： Ikuo Ozawa ,  Noriaki Maeda ,  Takuya Usami ,  Toshiki Sugiyama ,  Norihisa Sasano

IPC分类号： B62D2508

CPC分类号： F28D1/0435 ,  B60K11/04 ,  B62D25/084 ,  F01P2070/52 ,  F28F2275/143

摘要： A vehicle front end member including at least a radiator has an upper protrusion fixed to an upper insertion hole of a vehicle front end panel, and a lower protrusion fixed to a lower insertion hole of the front end panel. When an exterior force larger than a predetermined value is applied to the vehicle from a front side, a fixing state of the upper protrusion into the upper insertion hole is released, while a fixing state of the lower protrusion into the lower insertion hole is maintained. Therefore, is can prevent all the front end member from being separated from the front end panel when the exterior force is applied to the vehicle from the front i side. Accordingly, a damage of the front end member due to the exterior force is prevented while a collision of the front end member on a road surface is prevented.

摘要翻译： 至少包括散热器的车辆前端部件具有固定在车辆前端板的上部插入孔上的上部突出部和固定在前端板的下部插入孔的下部突起。 当从前侧向车辆施加大于预定值的外力时，释放上突起到上插入孔的固定状态，同时保持下突起到下插入孔的固定状态。 因此，当外部力从前侧施加到车辆时，可以防止所有的前端构件与前端面板分离。 因此，防止前端部件在路面上碰撞时由于外力导致的前端部件的损伤。

公开(公告)号：US20130026580A1

公开(公告)日：2013-01-31

申请号：US13559461

申请日：2012-07-26

申请人： Masao Morimoto ,  Noriaki Maeda ,  Yasuhisa Shimazaki

发明人： Masao Morimoto ,  Noriaki Maeda ,  Yasuhisa Shimazaki

IPC分类号： H01L27/11

CPC分类号： H01L27/1116 ,  G06F17/5072 ,  G11C11/412 ,  H01L23/528 ,  H01L27/0207 ,  H01L27/0928 ,  H01L27/1104

摘要： A semiconductor device having an SRAM which includes: a monolithic first active region in which a first transistor and a fifth transistor are disposed; a second active region separated from the first active region, in which a second transistor is disposed; a monolithic third active region in which a third transistor and a sixth transistor are disposed; and a fourth active region separated from the third active region, in which a fourth transistor is disposed. Each driver transistor is divided into a first transistor and a second transistor (or a third transistor and a fourth transistor) and these driver transistors are disposed over different active regions.

摘要翻译： 一种具有SRAM的半导体器件，包括：第一晶体管和第五晶体管设置在其中的单片第一有源区; 与第一有源区分离的第二有源区，其中设置第二晶体管; 其中设置第三晶体管和第六晶体管的单片第三有源区; 以及与第三有源区分离的第四有源区，其中设置第四晶体管。 每个驱动晶体管分为第一晶体管和第二晶体管（或第三晶体管和第四晶体管），并且这些驱动晶体管设置在不同的有源区域上。

公开(公告)号：US08319292B2

公开(公告)日：2012-11-27

申请号：US13169101

申请日：2011-06-27

申请人： Noriaki Maeda

发明人： Noriaki Maeda

IPC分类号： H01L27/092

CPC分类号： H01L27/088 ,  G11C11/412 ,  H01L27/0207 ,  H01L27/092 ,  H01L27/1104

摘要： A semiconductor device includes a first MISFET and a second MISFET which are formed over a semiconductor substrate and have the same conductive type. The first MISFET has a first gate insulating film arranged over the semiconductor substrate, a first gate electrode arranged over the first gate insulating film, and a first source region and a first drain region. The second MISFET has a second gate insulating film arranged over the semiconductor substrate, a second gate electrode arranged over the second gate insulating film, and a second source region and a second drain region. The first and the second gate electrode are electrically coupled, the first and the second source region are electrically coupled, and the first and the second drain region are electrically coupled. Accordingly, the first and the second MISFET are coupled in parallel. In addition, threshold voltages are different between the first and the second MISFET.

摘要翻译： 半导体器件包括形成在半导体衬底上并且具有相同导电类型的第一MISFET和第二MISFET。 第一MISFET具有布置在半导体衬底上的第一栅极绝缘膜，布置在第一栅极绝缘膜上的第一栅极，以及第一源极区域和第一漏极区域。 第二MISFET具有布置在半导体衬底上的第二栅极绝缘膜，布置在第二栅极绝缘膜上的第二栅极电极和第二源极区域和第二漏极区域。 第一和第二栅极电耦合，第一和第二源极区域电耦合，并且第一和第二漏极区域电耦合。 因此，第一和第二MISFET并联耦合。 此外，第一和第二MISFET之间的阈值电压是不同的。

公开(公告)号：US08125845B2

公开(公告)日：2012-02-28

申请号：US12687339

申请日：2010-01-14

申请人： Shigenobu Komatsu ,  Masanao Yamaoka ,  Noriaki Maeda ,  Masao Morimoto ,  Yasuhisa Shimazaki

发明人： Shigenobu Komatsu ,  Masanao Yamaoka ,  Noriaki Maeda ,  Masao Morimoto ,  Yasuhisa Shimazaki

IPC分类号： G11C7/00

CPC分类号： G11C11/413 ,  G11C7/08 ,  G11C7/22 ,  G11C7/227

摘要： Even when memory capacity of a memory that uses a replica bit-line is made higher, fluctuations of a generating timing of a sense-amplifier enable signal are reduced. A semiconductor integrated circuit device comprises a plurality of word lines, a plurality of bit-lines, a plurality of ordinary memory cells, an access control circuit, a plurality of sense-amplifiers, first and second replica bit-lines, first and second replica memory cells, and first and second logic circuits. The first and second replica memory cells are connected to the first and second replica bit-lines, respectively; inputs of the first and second logic circuits are connected to the first and second replica bit-lines, respectively; a sense-amplifier enable signal is generated from an output of the second logic circuit; and this signal is supplied to a plurality of sense-amplifiers.

摘要翻译： 即使使用复制位线的存储器的存储器容量更高，读出放大器使能信号的产生定时的波动也减小。 半导体集成电路器件包括多个字线，多个位线，多个普通存储器单元，访问控制电路，多个读出放大器，第一和第二复制位线，第一和第二复制 存储单元，以及第一和第二逻辑电路。 第一和第二复制存储器单元分别连接到第一和第二复制位线; 第一和第二逻辑电路的输入分别连接到第一和第二复制位线; 从第二逻辑电路的输出产生读出放大器使能信号; 并且该信号被提供给多个感测放大器。