公开(公告)号：US20150287686A1

公开(公告)日：2015-10-08

申请号：US14740286

申请日：2015-06-16

Applicant: Novatek Microelectronics Corp.

Inventor： Jung-Fu Hsu ,  Tai-Hung Lin ,  Chang-Tien Tsai

IPC: H01L23/00 ,  H01L27/02

CPC classification number: H01L24/06 ,  H01L23/50 ,  H01L23/60 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L27/0248 ,  H01L27/0292 ,  H01L27/0296 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05088 ,  H01L2224/05095 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/0612 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48132 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/49113 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/2064 ,  H01L2924/30205 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/43

Abstract: An integrated circuit device including a semiconductor substrate, a first bonding pad structure, a second bonding pad structure, and an internal bonding wire is provided. The first bonding pad structure is disposed on a surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The second bonding pad structure is disposed on the surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The first bonding pad structure is electrically coupled to the second bonding pad structure via the internal bonding wire. The integrated circuit device having a better electrical performance is provided by eliminating internal resistance drop in power supply trails or ground trails, and improving signal integrity of the integrated circuit device.

Abstract translation: 提供了包括半导体衬底，第一焊盘结构，第二接合焊盘结构和内部接合线的集成电路器件。 第一焊盘结构设置在半导体衬底的表面上并暴露在半导体衬底的外部。 第二焊盘结构设置在半导体衬底的表面上并暴露在半导体衬底的外部。 第一焊盘结构通过内部接合线电耦合到第二接合焊盘结构。 具有更好的电气性能的集成电路器件通过消除电源轨迹或接地轨迹中的内部电阻下降以及提高集成电路器件的信号完整性来提供。

公开(公告)号：US09627337B2

公开(公告)日：2017-04-18

申请号：US14740286

申请日：2015-06-16

Applicant: Novatek Microelectronics Corp.

Inventor： Jung-Fu Hsu ,  Tai-Hung Lin ,  Chang-Tien Tsai

IPC: H01L23/60 ,  H01L23/00 ,  H01L27/02

CPC classification number: H01L24/06 ,  H01L23/50 ,  H01L23/60 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L27/0248 ,  H01L27/0292 ,  H01L27/0296 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05088 ,  H01L2224/05095 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/0612 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48132 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/49113 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/2064 ,  H01L2924/30205 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/43

Abstract: An integrated circuit device including a semiconductor substrate, a first bonding pad structure, a second bonding pad structure, and an internal bonding wire is provided. The first bonding pad structure is disposed on a surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The second bonding pad structure is disposed on the surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The first bonding pad structure is electrically coupled to the second bonding pad structure via the internal bonding wire. The integrated circuit device having a better electrical performance is provided by eliminating internal resistance drop in power supply trails or ground trails, and improving signal integrity of the integrated circuit device.

公开(公告)号：US20140048935A1

公开(公告)日：2014-02-20

申请号：US14062899

申请日：2013-10-25

Applicant: Novatek Microelectronics Corp.

Inventor： Tai-Hung Lin ,  Chang-Tien Tsai

IPC: H01L23/60 ,  H01L23/49

CPC classification number: H01L24/05 ,  H01L23/49 ,  H01L23/60 ,  H01L24/06 ,  H01L24/42 ,  H01L24/45 ,  H01L24/48 ,  H01L27/0248 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05095 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48465 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/2064 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/43

Abstract: An integrated circuit device including a substrate, a first internal bonding pad, a second internal bonding pad, an external bonding pad and a bonding wire is provided. A first circuit and a second circuit are embedded in the substrate. The first internal bonding pad is disposed on a surface of the substrate and electrically coupled to the first circuit. The second internal bonding pad is disposed on the surface of the substrate and electrically coupled to the second circuit. The second internal bonding pad is electrically coupled to the first internal bonding pad via the bonding wire. The external bonding pad is electrically coupled to the first internal bonding pad.

Abstract translation: 提供一种集成电路装置，包括基板，第一内部接合焊盘，第二内部焊盘，外部焊盘和接合线。 第一电路和第二电路嵌入在基板中。 第一内部接合焊盘设置在基板的表面上并电耦合到第一电路。 第二内部接合焊盘设置在基板的表面上并电耦合到第二电路。 第二内部接合焊盘经由接合线电耦合到第一内部接合焊盘。 外部接合焊盘电耦合到第一内部接合焊盘。

公开(公告)号：US09881892B2

公开(公告)日：2018-01-30

申请号：US15412072

申请日：2017-01-23

Applicant: Novatek Microelectronics Corp.

Inventor： Jung-Fu Hsu ,  Tai-Hung Lin ,  Chang-Tien Tsai

IPC: H01L21/02 ,  H01L23/00 ,  H01L27/02 ,  H01L23/50

CPC classification number: H01L24/06 ,  H01L23/50 ,  H01L23/60 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L27/0248 ,  H01L27/0292 ,  H01L27/0296 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05088 ,  H01L2224/05095 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/0612 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48132 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/49113 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/2064 ,  H01L2924/30205 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/43

Abstract: An integrated circuit device including a semiconductor substrate, a first bonding pad structure, a second bonding pad structure, a third bonding pad structure, a first internal bonding wire, and a second internal bonding wire is provided. The first bonding pad structure is disposed on a surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The second bonding pad structure is disposed on the surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The third bonding pad structure is disposed on the surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The first bonding pad structure is electrically coupled to the third bonding pad structure via the first internal bonding wire. The third bonding pad structure is electrically coupled to the second bonding pad structure via the second internal bonding wire.

公开(公告)号：US20170133343A1

公开(公告)日：2017-05-11

申请号：US15412072

申请日：2017-01-23

Applicant: Novatek Microelectronics Corp.

Inventor： Jung-Fu Hsu ,  Tai-Hung Lin ,  Chang-Tien Tsai

IPC: H01L23/00 ,  H01L23/50 ,  H01L27/02

CPC classification number: H01L24/06 ,  H01L23/50 ,  H01L23/60 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L27/0248 ,  H01L27/0292 ,  H01L27/0296 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05088 ,  H01L2224/05095 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/0612 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48132 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/49113 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/2064 ,  H01L2924/30205 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/43

Abstract: An integrated circuit device including a semiconductor substrate, a first bonding pad structure, a second bonding pad structure, a third bonding pad structure, a first internal bonding wire, and a second internal bonding wire is provided. The first bonding pad structure is disposed on a surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The second bonding pad structure is disposed on the surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The third bonding pad structure is disposed on the surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The first bonding pad structure is electrically coupled to the third bonding pad structure via the first internal bonding wire. The third bonding pad structure is electrically coupled to the second bonding pad structure via the second internal bonding wire.

公开(公告)号：US20150194399A1

公开(公告)日：2015-07-09

申请号：US14666322

申请日：2015-03-24

Applicant: Novatek Microelectronics Corp.

Inventor： Tai-Hung Lin ,  Chang-Tien Tsai

IPC: H01L23/00 ,  H01L27/02

CPC classification number: H01L24/05 ,  H01L23/49 ,  H01L23/60 ,  H01L24/06 ,  H01L24/42 ,  H01L24/45 ,  H01L24/48 ,  H01L27/0248 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05095 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48465 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/2064 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/43 ,  H01L2224/45099

Abstract: An integrated circuit device including a substrate, a first internal bonding pad, a second internal bonding pad, an external bonding pad and a bonding wire is provided. A first circuit and a second circuit are embedded in the substrate. The first internal bonding pad is disposed on a surface of the substrate and electrically coupled to the first circuit. The second internal bonding pad is disposed on the surface of the substrate and electrically coupled to the second circuit. The second internal bonding pad is electrically coupled to the first internal bonding pad via the bonding wire. The external bonding pad is electrically coupled to the first internal bonding pad.

Abstract translation: 提供一种集成电路装置，包括基板，第一内部接合焊盘，第二内部焊盘，外部焊盘和接合线。 第一电路和第二电路嵌入在基板中。 第一内部接合焊盘设置在基板的表面上并电耦合到第一电路。 第二内部接合焊盘设置在基板的表面上并电耦合到第二电路。 第二内部接合焊盘经由接合线电耦合到第一内部接合焊盘。 外部接合焊盘电耦合到第一内部接合焊盘。

公开(公告)号：US09041201B2

公开(公告)日：2015-05-26

申请号：US14062899

申请日：2013-10-25

Applicant: Novatek Microelectronics Corp.

Inventor： Tai-Hung Lin ,  Chang-Tien Tsai

IPC: H01L23/60 ,  H01L23/00 ,  H01L27/02 ,  H01L23/49

CPC classification number: H01L24/05 ,  H01L23/49 ,  H01L23/60 ,  H01L24/06 ,  H01L24/42 ,  H01L24/45 ,  H01L24/48 ,  H01L27/0248 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05095 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48465 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/2064 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/43

Abstract: An integrated circuit device including a substrate, a first internal bonding pad, a second internal bonding pad, an external bonding pad and a bonding wire is provided. A first circuit and a second circuit are embedded in the substrate. The first internal bonding pad is disposed on a surface of the substrate and electrically coupled to the first circuit. The second internal bonding pad is disposed on the surface of the substrate and electrically coupled to the second circuit. The second internal bonding pad is electrically coupled to the first internal bonding pad via the bonding wire. The external bonding pad is electrically coupled to the first internal bonding pad.

Abstract translation: 提供一种集成电路装置，包括基板，第一内部接合焊盘，第二内部焊盘，外部焊盘和接合线。 第一电路和第二电路嵌入在基板中。 第一内部接合焊盘设置在基板的表面上并电耦合到第一电路。 第二内部接合焊盘设置在基板的表面上并电耦合到第二电路。 第二内部接合焊盘经由接合线电耦合到第一内部接合焊盘。 外部接合焊盘电耦合到第一内部接合焊盘。