-
公开(公告)号:US11347478B2
公开(公告)日:2022-05-31
申请号:US16975013
申请日:2019-02-22
申请人: Octavo Systems LLC
摘要: The present disclosure describes a mixed signal arithmetic logic unit configured to use a combination of analog processing elements and digital processing elements in a cohesive manner. Depending on the signals and the data received for processing, the analog processing elements and digital processing elements may be used separately, independently or in combination to optimize computational results and the performance of the mixed signal arithmetic logic unit.
-
公开(公告)号:US11032910B2
公开(公告)日:2021-06-08
申请号:US15968184
申请日:2018-05-01
申请人: Octavo Systems LLC
摘要: Systems and methods for the design and use of a System-in-Package (SiP) device with a connection layout for minimizing a system Printed Circuit Board (PCB) using the SiP are provided.
-
公开(公告)号:US20180317323A1
公开(公告)日:2018-11-01
申请号:US15968184
申请日:2018-05-01
申请人: Octavo Systems LLC
摘要: Systems and methods for the design and use of a System-in-Package (SiP) device with a connection layout for minimizing a system Printed Circuit Board (PCB) using the SiP are provided.
-
公开(公告)号:US11610844B2
公开(公告)日:2023-03-21
申请号:US16755376
申请日:2018-10-11
申请人: Octavo Systems LLC
IPC分类号: H01L23/52 , H01L23/538 , G11C5/04 , H01L21/56 , H01L23/31 , H01L23/498 , H01L23/00 , H01L25/065
摘要: High performance modules for use in System-in-Package (SIP) devices, and methods of manufacture for such modules and SIPs. The modules employ one or more interposer substrates on which high performance components and/or devices are operatively mounted and interconnected.
-
公开(公告)号:US11257803B2
公开(公告)日:2022-02-22
申请号:US16549841
申请日:2019-08-23
申请人: OCTAVO SYSTEMS LLC
摘要: A System in a Package (SiP) device is provided with an interconnect area or a physical space on a main SiP substrate that allows for a customizable second packaged component or device to be externally interconnected with the components on the main substrate of a packaged SiP to allow for modifications to the functionality of the components and devices on a primary (or main) SiP substrate.
-
公开(公告)号:US20200066702A1
公开(公告)日:2020-02-27
申请号:US16549841
申请日:2019-08-23
申请人: OCTAVO SYSTEMS LLC
摘要: Methods and structures for manufacturing one or more System in a Package (SiP) devices. The functionality of a packaged SiP device can be modified according to aspects of the disclosure.
-
公开(公告)号:US12001363B2
公开(公告)日:2024-06-04
申请号:US17926438
申请日:2021-05-21
申请人: Octavo Systems LLC
CPC分类号: G06F13/36 , G06F15/7807
摘要: A Secure Enclave SiP (SE-SiP) is disclosed. The SE-SiP provides all the security benefits of a system designed using a Trusted Platform Module (TPM), replaces the need to trust a general-purpose CPU chip vendor with the need to trust a much simpler more trustworthy configurable device, and replaces the need to trust the entire system motherboard manufacturer with the much more limited need to trust the SE-SiP manufacturer. It can provide privacy for the software and data sent to the system, resident on it, or retrieved from it, with respect to all parties—including the person/party in physical possession of the device.
-
公开(公告)号:US11502030B2
公开(公告)日:2022-11-15
申请号:US16330007
申请日:2017-08-31
申请人: OCTAVO SYSTEMS LLC
IPC分类号: H05K1/11 , H01L23/498 , H01L25/16 , H01L23/538 , H01L23/31 , H01L23/48 , H01L23/495 , H01L23/00 , H05K1/18 , H01L25/065
摘要: A substrate for a SIP is that has a portion of its top surface covered with spaced apart electrically conductive landing pads for electrical connection to components located on the surface and the landing pads serve as interconnection pads for making electrical connections between at least a portion of said pads when interconnected by a segment of bond wire to form at least a portion of the SIP. Methods for use of the universal substrate in SIP system design and manufacture of a SIP.
-
公开(公告)号:US10470294B2
公开(公告)日:2019-11-05
申请号:US15968171
申请日:2018-05-01
申请人: Octavo Systems LLC
发明人: Erik James Welsh , Peter Linder
摘要: Methods and systems for reducing the number of, and values of, passive components, such as capacitors, in System-in-Package devices below vendor recommendations for an active component are provided.
-
公开(公告)号:US20180317316A1
公开(公告)日:2018-11-01
申请号:US15968171
申请日:2018-05-01
申请人: Octavo Systems LLC
发明人: Erik James Welsh , Peter Linder
CPC分类号: H05K1/0231 , G06F17/5063 , G06F17/5072 , H01L25/16 , H05K1/181 , H05K2201/10015 , H05K2201/10522
摘要: Methods and systems for reducing the number of, and values of, passive components, such as capacitors, in System-in-Package devices below vendor recommendations for an active component are provided.
-
-
-
-
-
-
-
-
-