公开(公告)号：US20220028782A1

公开(公告)日：2022-01-27

申请号：US17375314

申请日：2021-07-14

Applicant: OLYMPUS CORPORATION

Inventor： Katsumi HOSOGAI ,  Satoru ADACHI ,  Takatoshi IGARASHI ,  Satoshi NASUNO

IPC: H01L23/522 ,  A61B1/05 ,  H01L27/146

Abstract: A semiconductor device includes a semiconductor substrate, a trench capacitor arranged on the semiconductor substrate, a first wiring layer, a second wiring layer, a first TSV penetrating the semiconductor substrate outside the trench capacitor, a second TSV penetrating the semiconductor substrate outside the trench capacitor, a first connecting terminal connected to the first TSV, a second connecting terminal connected to the first TSV, a third connecting terminal connected to the second TSV, and a fourth connecting terminal connected to the second TSV. A plurality of connecting terminals including the first through fourth connecting terminals are arranged dispersively over an entire area of the first wiring layer and the second wiring layer of the semiconductor device, thereby stabilizing voltage supplied to an image unit and achieving a stable image signal.

公开(公告)号：US20160022117A1

公开(公告)日：2016-01-28

申请号：US14872574

申请日：2015-10-01

Applicant: OLYMPUS CORPORATION

Inventor： Nana AKAHANE ,  Makoto ONO ,  Takahiro NISHIWAKI ,  Katsumi HOSOGAI

IPC: A61B1/00 ,  H04N5/225 ,  A61B1/045 ,  H04N7/18

CPC classification number: A61B1/00006 ,  A61B1/00009 ,  A61B1/045 ,  A61B1/05 ,  G02B23/2476 ,  H04N5/2253 ,  H04N5/361 ,  H04N5/363 ,  H04N5/3698 ,  H04N5/372 ,  H04N5/378 ,  H04N7/183 ,  H04N2005/2255

Abstract: An imaging element includes: a plurality of pixels; first vertical transfer lines; a second vertical transfer line; a reference voltage generator configured to generate a first reference voltage for a column-black reference signal, a second reference voltage for a line-black reference signal and a third reference voltage for phase adjustment; a phase adjusting signal generator configured to output a phase adjusting signal corresponding to the third reference voltage; a first reference signal generator configured to generate a column-black reference signal corresponding to the first reference voltage; a second reference signal generator configured to generate a line-black reference signal corresponding to the second reference voltage; and a timing generator configured to drive the phase adjusting signal generator, the first reference signal generator and the second reference signal generator to transmit the phase adjusting signal, the column-black reference signal and the line-black reference signal, respectively.

Abstract translation: 成像元件包括：多个像素; 第一条垂直输送线; 第二垂直传输线; 参考电压发生器，被配置为产生用于列黑参考信号的第一参考电压，用于线黑参考信号的第二参考电压和用于相位调整的第三参考电压; 相位调整信号发生器，被配置为输出与所述第三参考电压相对应的相位调整信号; 第一参考信号发生器，被配置为产生对应于所述第一参考电压的列黑参考信号; 第二参考信号发生器，被配置为产生对应于所述第二参考电压的线黑参考信号; 以及定时发生器，被配置为驱动所述相位调整信号发生器，所述第一参考信号发生器和所述第二参考信号发生器分别发送所述相位调整信号，所述列黑参考信号和所述线黑参考信号。

公开(公告)号：US20190037155A1

公开(公告)日：2019-01-31

申请号：US16152629

申请日：2018-10-05

Applicant: OLYMPUS CORPORATION

Inventor： Takanori TANAKA ,  Masashi SAITO ,  Takatoshi IGARASHI ,  Satoru ADACHI ,  Katsumi HOSOGAI ,  Nana AKAHANE

IPC: H04N5/345 ,  H04N5/369 ,  H04N5/378 ,  H04N5/376 ,  A61B1/05 ,  A61B1/00 ,  A61B1/045 ,  H01L27/146

CPC classification number: H04N5/3452 ,  A61B1/00009 ,  A61B1/04 ,  A61B1/045 ,  A61B1/05 ,  G02B23/24 ,  H01L27/14 ,  H01L27/14618 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/1469 ,  H04N5/369 ,  H04N5/3696 ,  H04N5/3698 ,  H04N5/3765 ,  H04N5/378

Abstract: An imaging element includes: a pixel chip where a pixel unit and a vertical selecting unit are arranged, the pixel unit including plural pixels that are arranged in a two-dimensional matrix, the pixels being configured to generate and output imaging signals; a transmission chip where at least a power source unit and a transmission unit are arranged; plural capacitative chips, each capacitative chip having capacitance functioning as a bypass condenser for a power source in the power source unit; and plural connecting portions configured to electrically connect the pixel chip, the transmission chip, and the capacitative chip respectively to another chip. The transmission chip is layered and connected at a back surface side of the pixel chip. The capacitative chips are layered and connected at a back surface side of the transmission chip. The connecting portions are arranged so as to overlap one another.

公开(公告)号：US20150342443A1

公开(公告)日：2015-12-03

申请号：US14825723

申请日：2015-08-13

Applicant: OLYMPUS CORPORATION

Inventor： Yuzuru TANABE ,  Katsumi HOSOGAI ,  Satoru ADACHI

IPC: A61B1/00 ,  H04N5/341 ,  H04N5/376 ,  A61B1/05 ,  H04N5/63 ,  H04N7/18 ,  H04N5/06 ,  H04N5/378 ,  H04N5/374

CPC classification number: A61B1/00006 ,  A61B1/00009 ,  A61B1/045 ,  A61B1/05 ,  G02B23/2484 ,  H04N5/06 ,  H04N5/341 ,  H04N5/374 ,  H04N5/3765 ,  H04N5/378 ,  H04N5/63 ,  H04N7/183

Abstract: An imaging element includes: a plurality of pixels arranged into a two-dimensional matrix, configured to receive light from outside, and configured to generate and output an imaging signal according to an amount of light received; a first transfer line connected to the pixel and configured to transfer the imaging signal; a pixel selection unit configured to perform a selection operation of selecting a selection target pixel from among the plurality of pixels in order to read the imaging signal out to the first transfer line and a de-selection operation of canceling the selection of the pixel being selected; and control unit configured to control the pixel selection unit. The control unit performs the selection operation of selecting a new selection target pixel after performing the de-selection operation on the basis of a synchronization signal from outside.

Abstract translation: 一种成像元件包括：排列成二维矩阵的多个像素，被配置为从外部接收光，并且被配置为根据所接收的光量产生和输出成像信号; 连接到像素并被配置为传送成像信号的第一传输线; 像素选择单元，被配置为执行从多个像素中选择选择目标像素的选择操作，以便将成像信号读出到第一传送线，以及取消选择操作以取消所选择的像素的选择 ; 以及控制单元，被配置为控制像素选择单元。 控制单元根据来自外部的同步信号，在执行去选择操作之后执行选择新的选择对象像素的选择操作。