Abstract:
An imaging element includes: a plurality of pixels configured to receive light from outside and generate and output an imaging signal depending on an amount of the light received; a first transfer line connected to the pixel; a second transfer line; a column selection switch configured to select one pixel column and output the imaging signal to the second transfer line; a column source follower including a gate to which the imaging signal transferred by the first transfer line is input, a drain end being connected to a power supply voltage, and a source end being connected to the column selection switch; a constant current source configured to drive the column source follower and read out the imaging signal to the second transfer line; and a current generating unit configured to flow a predetermined current to the source end side of the column source follower.
Abstract:
An image sensor includes: photoelectric conversion elements configured to receive light and accumulate a charge corresponding to an amount of received light; an imaging signal generating unit that converts the charge accumulated in each photoelectric conversion element into a voltage to generate an imaging signal; and a reference signal generating unit that generates a reference signal having a fluctuation component with a same phase as the imaging signal. The imaging signal generating unit includes: a conversion circuit that converts the charge accumulated in each photoelectric conversion element into the imaging signal; a noise eliminating circuit that eliminates a noise component included in the imaging signal; and an output circuit that outputs the imaging signal from the conversion circuit. The reference signal generating unit includes a circuit having a same structure as that of at least one of the conversion circuit, the noise eliminating circuit, and the output circuit.
Abstract:
An endoscope includes: an image sensor having a light receiving plane; a laminate provided to be opposed to an opposite side of the image sensor from the light receiving plane and having a plurality of layers formed by lamination of a plurality of semiconductor elements; and an insertion section having the image sensor and the laminate therein. The laminate includes: a first active layer in which a first active element is provided; a first passive layer in which a first passive element is provided and which is provided between the first active layer and the image sensor; and a through-silicon via provided in each of the first active layer and the first passive layer.
Abstract:
A solid-state imaging apparatus includes an imaging section in which a plurality of pixels, each of which has a photoelectric conversion element, are disposed in a matrix; a clock generation section; a reference signal generation section configured to generate a reference signal whose amplitude increases or decreases with the passage of time; a comparison section disposed corresponding to a column in an array of the plurality of pixels; a latch section disposed corresponding to the comparison section and configured to latch logic states of the plurality of phase signals; and a latch control section disposed corresponding to the comparison section, wherein the comparison section includes a differential amplifier, a current output element, and a third transistor, and wherein the comparison section outputs a second comparison signal based on the current output from the current output element after the second timing.
Abstract:
An imaging element includes: a pixel chip where a pixel unit and a vertical selecting unit are arranged, the pixel unit including plural pixels that are arranged in a two-dimensional matrix, the pixels being configured to generate and output imaging signals; a transmission chip where at least a power source unit and a transmission unit are arranged; plural capacitative chips, each capacitative chip having capacitance functioning as a bypass condenser for a power source in the power source unit; and plural connecting portions configured to electrically connect the pixel chip, the transmission chip, and the capacitative chip respectively to another chip. The transmission chip is layered and connected at a back surface side of the pixel chip. The capacitative chips are layered and connected at a back surface side of the transmission chip. The connecting portions are arranged so as to overlap one another.