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    Integrated driving circuitry for gas discharge panel
    1.
    发明授权
    Integrated driving circuitry for gas discharge panel 失效
    集成驱动电路用于气体放电面板

    公开(公告)号：US3614739A

    公开(公告)日：1971-10-19

    申请号：US3614739D

    申请日：1969-05-02

    Applicant: OWENS ILLINOIS INC

    Inventor： JOHNSON WILLIAM E

    IPC: G09G3/28 ,  G09G3/288 ,  H01L23/535 ,  H01L27/06 ,  H01J17/38 ,  H05B37/00

    CPC classification number: H01L23/535 ,  G09G3/296 ,  G09G3/297 ,  H01L27/0611 ,  H01L27/0652 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

    Abstract: Solid-state low-level to high-level interfacing circuits for multiple discharge gas discharge devices capable of feeding through a high-level periodic sustaining voltage to the discharge device with minimum degradation. The output is the algebraic sum of the periodic sustaining voltage and a level converted logic signal. NPN circuits are used to drive one set of conductors in an array and PNP circuits are used for driving transversely related conductor arrays in the gas discharge device. Dielectric isolation in the fabrication of the integrated circuits is utilized and the circuits are such as to not require any inductance or capacitance elements, thus reducing cost and size of the circuits. The circuit appears as a low impedance to the load. There is no mixing of active elements (NPN vs PNP) in a circuit wafer or chip. Consult the specification for features and details.

    Low voltage pulse system for addressing gas discharge display/memory panels
    4.
    发明授权
    Low voltage pulse system for addressing gas discharge display/memory panels 失效
    用于寻址气体放电显示/记忆面板的低电压脉冲系统

    公开(公告)号：US3673460A

    公开(公告)日：1972-06-27

    申请号：US3673460D

    申请日：1970-09-15

    Applicant: OWENS ILLINOIS INC

    Inventor： JOHNSON WILLIAM E ,  SCHMERSAL LARRY J

    IPC: G09G3/28 ,  G09G3/288 ,  H05B37/02

    CPC classification number: G09G3/296 ,  G09G3/297

    Abstract: There is disclosed a low voltage pulse addressing system for addressing gas discharge display/memory panels wherein a portion of the pulse voltage is combined with the sustainer voltage so as to reduce the voltage required from each line drive pulsing circuit so as to permit utilization of low voltage integrated circuits.

    Abstract translation: 公开了一种用于寻址气体放电显示/存储器面板的低压脉冲寻址系统，其中脉冲电压的一部分与维持器电压组合，以便减少每个线路驱动脉冲电路所需的电压，以便允许低 电压集成电路。

    Electronic circuitry for a flat gaseous discharge display panel
    5.
    发明授权
    Electronic circuitry for a flat gaseous discharge display panel 失效
    平面放电显示面板的电子电路

    公开(公告)号：US3662184A

    公开(公告)日：1972-05-09

    申请号：US3662184D

    申请日：1970-04-13

    Applicant: OWENS ILLINOIS INC

    Inventor： JOHNSON WILLIAM E

    IPC: G06G7/14 ,  G09G3/28 ,  G09G3/288 ,  H03K17/60 ,  H03K17/62 ,  H03K17/64 ,  H04N3/10 ,  H04N3/12 ,  G11C11/28

    CPC classification number: G09G3/296 ,  G06G7/14 ,  G09G3/297 ,  G09G2320/0209 ,  H03K17/60 ,  H03K17/601 ,  H03K17/6221 ,  H03K17/64 ,  H04N3/10 ,  H04N3/125

    Abstract: An improved pulse generator circuit primarily for multiple discharge gaseous display and/or memory panels having crosstalk eliminating means. A low level voltage signal from an addressing logic system is inductively translated to a high voltage unidirectional pulse and added to a periodic alternating sustaining voltage at selected times to control ''''on''''-''''off'''' states of selected discharge units. The improvements relate to utilization of an electronic switching circuit responsive to a spurious voltage signal to provide a low impedance to voltages induced or capacitively coupled to display lines associated therewith from other conductors. Consult the specification for other features and details.

    Abstract translation: 一种主要用于具有串扰消除装置的多放电气体显示器和/或存储器面板的改进的脉冲发生器电路。 来自寻址逻辑系统的低电平电压信号被电感地转换为高电压单向脉冲，并且在选定的时间加到周期性交替维持电压以控制所选择的放电单元的“开”状​​态。 这些改进涉及响应于杂散电压信号的电子开关电路的利用，以向与其相关的显示线感应或电容耦合的电压提供低阻抗。 有关其他功能和细节，请参阅规范。

    Driving circuitry for gas discharge panel
    6.
    发明授权
    Driving circuitry for gas discharge panel 失效
    用于气体放电面板的驱动电路

    公开(公告)号：US3611296A

    公开(公告)日：1971-10-05

    申请号：US3611296D

    申请日：1969-12-29

    Applicant: OWENS ILLINOIS INC

    Inventor： JOHNSON WILLIAM E

    IPC: H04N5/66 ,  G09G3/28 ,  G09G3/288 ,  H04N3/12 ,  H01J17/48 ,  H01J61/33 ,  H05B41/44

    CPC classification number: G09G3/296 ,  G09G3/297 ,  H04N3/125

    Abstract: Solid-state low level to high-level interfacing pulser circuits for multiple discharge gas discharge devices capable of feeding through a high-level periodic sustaining voltage to the discharge device with minimum degradation. The output is the algebraic sum of the periodic sustaining voltage and a level converted logic signal. Logic circuitry is included which may be fabricated with or included in packages containing interfacing pulser circuits. There is no mixing of active elements (NPN vs. PNP) so many circuits may be incorporated on a single wafer or chip. Consult the specification for features and details.

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