公开(公告)号：US20060291589A1

公开(公告)日：2006-12-28

申请号：US11203504

申请日：2005-08-11

申请人： Oren Eliezer ,  Francis Cruise ,  Robert Staszewski ,  Jaimin Mehta

发明人： Oren Eliezer ,  Francis Cruise ,  Robert Staszewski ,  Jaimin Mehta

IPC分类号： H04L27/12

CPC分类号： H03F3/24 ,  H03C3/40 ,  H03C5/00 ,  H03F2200/324 ,  H03F2200/331 ,  H03F2200/336 ,  H04K1/02 ,  H04L27/04 ,  H04L27/2092 ,  H04L27/365

摘要： A novel apparatus and method for a fully digital quadrature architecture for a complex modulator. The complex modulator can substitute for existing prior art analog quadrature modulator structures and those based on a digital polar architecture (r, θ). The modulator effectively operates as a complex digital-to-analog converter where the digital inputs are given in Cartesian form, namely I and Q representing the complex number I+jQ, while the output is a modulated RF signal having a corresponding amplitude and phase shift. The phase shift being with respect to a reference phase dictated by the local oscillator, which is also input to the converter/modulator. Several embodiments are provided including modulators incorporating dual I and Q transistor arrays, a single shared I/Q transistor array, modulators with single ended and differential outputs and modulators with single and dual polarity clock and I/Q data signals.

摘要翻译： 一种用于复调制器的全数字正交架构的新型装置和方法。 复调制器可以替代现有的现有技术的模拟正交调制器结构和基于数字极坐标（r，θ）的那些。 调制器有效地作为复数数模转换器工作，其中数字输入以笛卡尔形式给出，即I和Q表示复数I + jQ，而输出是具有对应幅度和相移的调制RF信号 。 相移相对于由本地振荡器指定的参考相位，本地振荡器也被输入到转换器/调制器。 提供了包括具有双I和Q晶体管阵列的调制器，单个共享I / Q晶体管阵列，具有单端和差分输出的调制器以及具有单极性和双极性时钟和I / Q数据信号的调制器的几个实施例。

公开(公告)号：US07460612B2

公开(公告)日：2008-12-02

申请号：US11203504

申请日：2005-08-11

申请人： Oren E. Eliezer ,  Francis P. Cruise ,  Robert B. Staszewski ,  Jaimin Mehta

发明人： Oren E. Eliezer ,  Francis P. Cruise ,  Robert B. Staszewski ,  Jaimin Mehta

IPC分类号： H04L27/00

CPC分类号： H03F3/24 ,  H03C3/40 ,  H03C5/00 ,  H03F2200/324 ,  H03F2200/331 ,  H03F2200/336 ,  H04K1/02 ,  H04L27/04 ,  H04L27/2092 ,  H04L27/365

摘要： A novel apparatus and method for a fully digital quadrature architecture for a complex modulator. The complex modulator can substitute for existing prior art analog quadrature modulator structures and those based on a digital polar architecture (r, θ). The modulator effectively operates as a complex digital-to-analog converter where the digital inputs are given in Cartesian form, namely I and Q representing the complex number I+jQ, while the output is a modulated RF signal having a corresponding amplitude and phase shift. The phase shift being with respect to a reference phase dictated by the local oscillator, which is also input to the converter/modulator. Several embodiments are provided including modulators incorporating dual I and Q transistor arrays, a single shared I/Q transistor array, modulators with single ended and differential outputs and modulators with single and dual polarity clock and I/Q data signals.

摘要翻译： 一种用于复调制器的全数字正交架构的新型装置和方法。 复调制器可以替代现有的现有技术的模拟正交调制器结构和基于数字极坐标（r，θ）的那些。 调制器有效地作为复数数模转换器工作，其中数字输入以笛卡尔形式给出，即I和Q表示复数I + jQ，而输出是具有对应幅度和相移的调制RF信号 。 相移相对于由本地振荡器指定的参考相位，本地振荡器也被输入到转换器/调制器。 提供了包括具有双I和Q晶体管阵列的调制器，单个共享I / Q晶体管阵列，具有单端和差分输出的调制器以及具有单极性和双极性时钟和I / Q数据信号的调制器的几个实施例。

公开(公告)号：US08170507B2

公开(公告)日：2012-05-01

申请号：US12260832

申请日：2008-10-29

申请人： Yongtao Wang ,  Khurram Waheed ,  Sameh S. Rezeq ,  Jaimin Mehta ,  Prasad Srinivasan ,  Khurram Muhammad

发明人： Yongtao Wang ,  Khurram Waheed ,  Sameh S. Rezeq ,  Jaimin Mehta ,  Prasad Srinivasan ,  Khurram Muhammad

IPC分类号： H04B1/04

CPC分类号： H03F3/24 ,  H03F1/3241 ,  H03F3/72 ,  H04B2001/0425

摘要： Predistortion methods and apparatus for transmitter linearization in a communication transceiver are disclosed. An example apparatus to linearize a digitally controlled pre-power amplifier included in a transmitter of a communication transceiver disclosed herein comprises a predistorter to predistort an input signal to be processed by the digitally controlled pre-power amplifier, a coupling path within the communication transceiver to couple an output of the digitally controlled pre-power amplifier to an input of a receiver included in the communication transceiver without enabling an output power amplifier stage of a multi-stage power amplifier coupled to an output of the digitally controlled pre-power amplifier, wherein no additional hardware components are required to implement the coupling path within the communication transceiver, and a predistortion evaluator comprising a predistortion calibrator and a predistortion compensator to process data demodulated by the receiver to generate and update predistortion values for use by the predistorter.

摘要翻译： 公开了用于通信收发器中的发射机线性化的预失真方法和装置。 线性化包括在本文公开的通信收发器的发射机中的数字控制的预功率放大器的示例性装置包括预失真器，用于预失真由数字控制的预功率放大器处理的输入信号，通信收发器内的耦合路径 将数字控制的预功率放大器的输出耦合到通信收发器中包括的接收器的输入，而不使能耦合到数字控制的预功率放大器的输出的多级功率放大器的输出功率放大器级，其中 不需要额外的硬件组件来实现通信收发信机内的耦合路径，以及预失真评估器，包括预失真校准器和预失真补偿器，用于处理由接收机解调的数据，以生成和更新预失真值供预失真器使用。

公开(公告)号：US20100105338A1

公开(公告)日：2010-04-29

申请号：US12260832

申请日：2008-10-29

申请人： Yongtao Wang ,  Khurram Waheed ,  Sameh S. Rezeq ,  Jaimin Mehta ,  Prasad Srinivasan ,  Khurram Muhammad

发明人： Yongtao Wang ,  Khurram Waheed ,  Sameh S. Rezeq ,  Jaimin Mehta ,  Prasad Srinivasan ,  Khurram Muhammad

IPC分类号： H04B1/62 ,  H03F1/32 ,  H04B1/40

CPC分类号： H03F3/24 ,  H03F1/3241 ,  H03F3/72 ,  H04B2001/0425

摘要： Predistortion methods and apparatus for transmitter linearization in a communication transceiver are disclosed. An example apparatus to linearize a digitally controlled pre-power amplifier included in a transmitter of a communication transceiver disclosed herein comprises a predistorter to predistort an input signal to be processed by the digitally controlled pre-power amplifier, a coupling path within the communication transceiver to couple an output of the digitally controlled pre-power amplifier to an input of a receiver included in the communication transceiver without enabling an output power amplifier stage of a multi-stage power amplifier coupled to an output of the digitally controlled pre-power amplifier, wherein no additional hardware components are required to implement the coupling path within the communication transceiver, and a predistortion evaluator comprising a predistortion calibrator and a predistortion compensator to process data demodulated by the receiver to generate and update predistortion values for use by the predistorter.

摘要翻译： 公开了用于通信收发器中的发射机线性化的预失真方法和装置。 线性化包括在本文公开的通信收发器的发射机中的数字控制的预功率放大器的示例性装置包括预失真器，用于预失真由数字控制的预功率放大器处理的输入信号，通信收发器内的耦合路径 将数字控制的预功率放大器的输出耦合到通信收发器中包括的接收器的输入，而不使能耦合到数字控制的预功率放大器的输出的多级功率放大器的输出功率放大器级，其中 不需要额外的硬件组件来实现通信收发信机内的耦合路径，以及预失真评估器，包括预失真校准器和预失真补偿器，用于处理由接收机解调的数据，以生成和更新预失真值供预失真器使用。

公开(公告)号：US20090004981A1

公开(公告)日：2009-01-01

申请号：US12147477

申请日：2008-06-27

申请人： Oren E. Eliezer ,  Gennady Feygin ,  Jaimin Mehta

发明人： Oren E. Eliezer ,  Gennady Feygin ,  Jaimin Mehta

IPC分类号： H04B1/04

CPC分类号： H04B1/0483 ,  H03F1/0211 ,  H03F1/3247 ,  H03F1/3282 ,  H03F3/24

摘要： A novel apparatus and method of improving the power efficiency of a digital transmitter for non-constant-amplitude modulation schemes. The power efficiency improvement mechanism of the invention leverages the high efficiency of a switched-mode power supply (SMPS) that supplies the high DC current to the transmitter's power amplifier, while compensating for its limitations using predistortion. The predistortion may be achieved using any suitable technique such as digital signal processing, hardware techniques, etc. A switched mode power supply (i.e. switching regulator) is used to provide a slow form (i.e. reduced bandwidth) of envelope tracking (based on a narrower bandwidth distorted version of the envelope waveform) such that the switching regulator can use a lower switching rate corresponding to the lower bandwidth, thereby obtaining high efficiency in the switching regulator. The resulting AM-AM and AM-PM distortions in the power amplifier are compensated through predistortion of the digital amplitude modulating signal which dictates the envelope at the PA input. Similarly, the phase modulation is also compensated prior to the PA, such that once it undergoes the distortion in the PA, the end result is sufficiently close to the desired phase.

摘要翻译： 一种改进用于非恒定幅度调制方案的数字发射机的功率效率的新型装置和方法。 本发明的功率效率改进机制利用了向发射机功率放大器提供高直流电流的开关模式电源（SMPS）的高效率，同时使用预失真来补偿其限制。 可以使用诸如数字信号处理，硬件技术等的任何合适的技术来实现预失真。开关模式电源（即开关稳压器）用于提供包络跟踪的较慢形式（即减小的带宽）（基于较窄的 包络波形的带宽失真版本），使得开关稳压器可以使用对应于较低带宽的较低开关速率，从而在开关稳压器中获得高效率。 在功率放大器中产生的AM-AM和AM-PM失真通过数字幅度调制信号的预失真来补偿，这决定了PA输入端的包络。 类似地，相位调制也在PA之前被补偿，使得一旦其经历了PA中的失真，则最终结果足够接近期望的相位。