公开(公告)号：US06449211B1

公开(公告)日：2002-09-10

申请号：US09945021

申请日：2001-08-31

申请人： Owen W. Jungroth ,  Rajesh Sundaram ,  Mase J. Taub ,  Rupinder K. Bains ,  Raymond Zeng ,  Binh N. Ngo ,  Bharat Pathak

发明人： Owen W. Jungroth ,  Rajesh Sundaram ,  Mase J. Taub ,  Rupinder K. Bains ,  Raymond Zeng ,  Binh N. Ngo ,  Bharat Pathak

IPC分类号： G11C800

CPC分类号： G11C16/30 ,  G11C5/147 ,  G11C8/08

摘要： A circuit includes (i) an N-channel device having a gate, a source connected to low voltage, and a drain connected to a memory select gate, (ii) a P-channel device having a gate, a source, and a drain connected to the drain of the N-channel device, and (iii) a voltage supply connected to the source of the P-channel device, the voltage supply switching between a first high voltage and a first lower voltage. A gate driver supplies, to the gates of the N-channel and P-channel devices, a second high voltage, a second low voltage, or an intermediary voltage between the second high voltage and second low voltage. The gate driver supplies the intermediary voltage when the voltage supply switches between the first high voltage and first lower voltage.

摘要翻译： 电路包括（i）具有栅极，连接到低电压的源极和连接到存储器选择栅极的漏极的N沟道器件，（ii）具有栅极，源极和漏极的P沟道器件 连接到N沟道器件的漏极，以及（iii）连接到P沟道器件源极的电压源，电压源在第一高电压和第一较低电压之间切换。 栅极驱动器向N沟道和P沟道器件的栅极提供第二高电压，第二低电压或第二高电压和第二低电压之间的中间电压。 当电源在第一高电压和第一低电压之间切换时，栅极驱动器提供中间电压。

公开(公告)号：US06356062B1

公开(公告)日：2002-03-12

申请号：US09670850

申请日：2000-09-27

申请人： Daniel R. Elmhurst ,  Binh N. Ngo ,  Rupinder K. Bains

发明人： Daniel R. Elmhurst ,  Binh N. Ngo ,  Rupinder K. Bains

IPC分类号： G05F156

CPC分类号： H02M3/073 ,  Y10S323/907

摘要： A regulator circuit to control the output of a charge pump circuit, to reduce the effects of operating temperature and process variations on available output current from the charge pump circuit. A predetermined fraction of the output voltage of the charge pump circuit is fed back to the input of a differential amplifier, which compares it to a reference voltage. The output of the differential amplifier feeds a voltage controlled oscillator (VCO), which in turn generates a clock signal that is used to drive the charge pump circuit. The normal temperature characteristics of this configuration cause the output of the charge pump circuit to degrade with temperature changes. The regulator circuit can be placed between the differential amplifier and the VCO to adjust the voltage driving the VCO. In one embodiment, a biasing resistor with a negative temperature coefficient can be used in the regulator circuit to offset the normal effects of temperature on the circuit. In another embodiment, multiple such resistors can be selectable with programmable logic, so that process variations during manufacture can be compensated for by selecting the resistor value that most closely provides optimal biasing.

摘要翻译： 用于控制电荷泵电路的输出的调节器电路，以减少来自电荷泵电路的可用输出电流的工作温度和工艺变化的影响。 电荷泵电路的输出电压的预定分数被反馈到差分放大器的输入，差分放大器将其与参考电压进行比较。 差分放大器的输出馈送压控振荡器（VCO），其又产生用于驱动电荷泵电路的时钟信号。 该配置的常温特性使电荷泵电路的输出随温度变化而降低。 调节器电路可以放置在差分放大器和VCO之间，以调节驱动VCO的电压。 在一个实施例中，可以在调节器电路中使用具有负温度系数的偏置电阻器来抵消温度对电路的正常影响。 在另一个实施例中，可以用可编程逻辑选择多个这样的电阻器，从而可以通过选择最接近地提供最佳偏置的电阻器值来补偿制造期间的工艺变化。

公开(公告)号：US06891426B2

公开(公告)日：2005-05-10

申请号：US10056657

申请日：2001-10-19

申请人： Raymond Zeng ,  Binh N. Ngo

发明人： Raymond Zeng ,  Binh N. Ngo

IPC分类号： H02M3/07 ,  G05F1/10

CPC分类号： H02M3/073 ,  H02M2001/0032 ,  H02M2003/077 ,  Y02B70/16

摘要： A method of providing multiple voltage outputs includes receiving an input signal from a multifunctional pump. The method also includes sending a first output signal based on the input signal using a first switch and sending a second output signal based on the input signal using a second switch and a transistor.

摘要翻译： 提供多个电压输出的方法包括从多功能泵接收输入信号。 该方法还包括使用第一开关基于输入信号发送第一输出信号，并且使用第二开关和晶体管基于输入信号发送第二输出信号。

公开(公告)号：US6072723A

公开(公告)日：2000-06-06

申请号：US306322

申请日：1999-05-06

申请人： Sandeep K. Guliani ,  Binh N. Ngo

发明人： Sandeep K. Guliani ,  Binh N. Ngo

IPC分类号： G11C16/00

CPC分类号： G11C29/789 ,  G11C16/0441 ,  G11C16/26

摘要： A bias circuit for a memory cell having first and second floating gate devices, and third and fourth reference devices, one of which has an output terminal coupled thereto is described. In one embodiment, the bias circuit includes a first capacitor including a first terminal coupled to the gates of the first and second devices, and a second terminal coupled to a power supply terminal, and a second capacitor including a first terminal coupled to the gates of the third and fourth devices, and a second terminal coupled to the power supply terminal. The bias circuit further includes a reference circuit including a first terminal having a first signal thereon and coupled to the gates of the first and second devices, and a second terminal having a second signal thereon and coupled to the gates of the third and fourth devices, the reference circuit to periodically turn on the first and second signals. The bias circuit reduces standby current and wake up time of redundant circuits in non-volatile memory devices.

摘要翻译： 一种用于具有第一和第二浮动栅极器件的存储器单元的偏置电路，以及第三和第四参考器件，其中一个具有与其耦合的输出端子。 在一个实施例中，偏置电路包括第一电容器，其包括耦合到第一和第二器件的栅极的第一端子和耦合到电源端子的第二端子，以及包括耦合到栅极的第一端子的第二电容器 第三和第四器件，以及耦合到电源端子的第二端子。 偏置电路还包括参考电路，其包括在其上具有第一信号并且耦合到第一和第二器件的栅极的第一端子，以及在其上具有第二信号并且耦合到第三和第四器件的栅极的第二端子， 该参考电路周期性地接通第一和第二信号。 偏置电路可以降低非易失性存储器件中冗余电路的待机电流和唤醒时间。