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公开(公告)号:US20190245490A1
公开(公告)日:2019-08-08
申请号:US16314109
申请日:2017-07-04
申请人: WUPATEC
发明人: Emmanuel GATARD , Pierre LACHAUD
CPC分类号: H03F1/0227 , H01Q1/50 , H03F1/025 , H03F1/32 , H03F3/189 , H03F3/24 , H03F3/245 , H03F2200/102 , H03F2200/451 , H03F2200/511 , H03F2201/3215 , H04L27/2614
摘要: A system for monitoring the peak power of a telecommunication signal to be transmitted for an RF power amplification, includes a digital processing device with a processing chain having an envelope tracking control logic for generating an envelope tracking control signal at discrete levels. The processing chain further includes a driver logic of the DC-DC converter, which processing chain has a device for calculating peak value over a sliding time window and a supply voltage selection device.
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公开(公告)号:US10116473B1
公开(公告)日:2018-10-30
申请号:US15926395
申请日:2018-03-20
CPC分类号: H04L25/4927 , H03F1/0227 , H03F1/025 , H03F3/187 , H03F3/213 , H03F2200/03 , H03F2200/331 , H04B14/046 , H04L25/03159 , H04R3/04
摘要: An apparatus may include a delta-sigma modulator for quantization noise shaping of a digital signal, a digital-to-analog converter configured to generate an analog signal from the digital signal, and an amplifier configured to amplify the analog signal and powered from a charge pump, wherein the charge pump is configured to operate at a switching frequency approximately equal to a zero of a modulator noise transfer function of the delta-sigma modulator, such that the impact of charge pump noise on a total harmonic distortion noise of the apparatus is minimized.
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公开(公告)号:US20180294776A1
公开(公告)日:2018-10-11
申请号:US15915936
申请日:2018-03-08
发明人: Peter Harris Robert Popplewell , Jakub F. Pingot , Florinel G. Balteanu , Martin Wilson , Mark Tuckwell
CPC分类号: H03F1/0227 , H02M3/156 , H02M3/158 , H03F1/0211 , H03F1/025 , H03F3/19 , H03F3/193 , H03F3/195 , H03F3/21 , H03F3/211 , H03F2200/102 , H03F2200/451 , H03F2203/21106
摘要: Apparatus and methods for reducing inductor ringing of a voltage converter are provided. In certain configurations, a voltage converter includes an inductor connected between a first node and a second node, a plurality of switches, and a bypass circuit having an activated state and a deactivated state. The switches includes a first switch connected between a battery voltage and the first node, a second switch connected between the first node and a ground voltage, a third switch connected between the second node and the ground voltage, and a fourth switch connected between the second node and the output. The bypass circuit includes a first pair of transistors connected between the first node and the second node and configured to turn on to bypass the inductor in the activated state and to turn off in the deactivated state.
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公开(公告)号:US09973147B2
公开(公告)日:2018-05-15
申请号:US15479832
申请日:2017-04-05
申请人: Qorvo US, Inc.
发明人: Nadim Khlat
CPC分类号: H03F1/0222 , H03F1/0211 , H03F1/0227 , H03F1/0244 , H03F1/025 , H03F1/0277 , H03F1/305 , H03F3/19 , H03F3/21 , H03F3/245 , H03F3/68 , H03F2200/102 , H03F2200/111 , H03F2200/421 , H03F2200/451
摘要: An envelope tracking power management circuit is disclosed. An envelope tracking power management circuit includes a first envelope tracking amplifier(s) and a second envelope tracking amplifier(s), each configured to amplify a respective radio frequency (RF) signal(s) based on a respective supply voltage. A power management circuit can determine that a selected envelope tracking amplifier, which can be either the first envelope tracking amplifier(s) or the second envelope tracking amplifier(s), receives the respective supply voltage lower than a voltage required to amplify the respective RF signal(s) to a predetermined voltage. In response, the power management circuit provides a boosted voltage, which is no less than the required voltage, to the selected envelope tracking amplifier. As such, it is possible to enable the selected envelope tracking amplifier to amplify the respective RF signal(s) to the predetermined voltage without increasing cost, footprint, and power consumption of the envelope tracking power management circuit.
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公开(公告)号:US09973145B2
公开(公告)日:2018-05-15
申请号:US14958848
申请日:2015-12-03
申请人: pSemi Corporation
IPC分类号: H03F3/60 , H03F1/02 , H03F3/193 , H03F3/21 , H03F1/22 , H03F1/32 , H03F1/56 , H03F3/195 , H03F3/24 , H03F3/45 , H03F3/191
CPC分类号: H03F1/0205 , H03F1/0216 , H03F1/0222 , H03F1/0227 , H03F1/0244 , H03F1/025 , H03F1/0277 , H03F1/223 , H03F1/3247 , H03F1/3282 , H03F1/56 , H03F3/191 , H03F3/193 , H03F3/195 , H03F3/21 , H03F3/211 , H03F3/24 , H03F3/45179 , H03F3/45183 , H03F3/45188 , H03F2200/102 , H03F2200/108 , H03F2200/129 , H03F2200/15 , H03F2200/18 , H03F2200/213 , H03F2200/222 , H03F2200/336 , H03F2200/387 , H03F2200/408 , H03F2200/411 , H03F2200/451 , H03F2200/534 , H03F2200/537 , H03F2200/541 , H03F2200/546 , H03F2200/78 , H03F2201/3233 , H03F2203/45112 , H03F2203/45366 , H03F2203/45544 , H03F2203/45638 , H03F2203/45731
摘要: An envelope tracking amplifier having stacked transistors is presented. The envelope tracking amplifier uses dynamic bias voltages at one or more gates of the stacked transistors in addition to a dynamic bias voltage at a drain of a transistor.
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公开(公告)号:US09859853B2
公开(公告)日:2018-01-02
申请号:US15494153
申请日:2017-04-21
发明人: Daniel Lee Kaczman
CPC分类号: H03F1/565 , H03F1/025 , H03F3/19 , H03F3/195 , H03F3/245 , H03F2200/102 , H03F2200/321 , H03F2200/387 , H03F2200/391 , H03F2200/411 , H03F2200/451 , H04B1/40
摘要: Apparatus and methods for output matching of power amplifiers are provided. In certain configurations, a mobile device includes a power amplifier that amplifies an RF signal to generate an amplified RF signal at an output, an envelope tracker that generates a power amplifier supply voltage based on an envelope of the RF signal, a supply voltage biasing circuit that provides the power amplifier supply voltage from the envelope tracker to the output of the power amplifier, and an output matching circuit connected to the output of the power amplifier via an input node. The output matching circuit includes a first capacitor and a first inductor connected in series between the input node and ground, a second capacitor connected between the input node and ground, a second inductor connected between the input node and an intermediate node, and a DC blocking capacitor connected between the intermediate node and an output node.
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7.
公开(公告)号:US20170373643A1
公开(公告)日:2017-12-28
申请号:US15528283
申请日:2015-11-20
发明人: Xida LIU
IPC分类号: H03F1/02
CPC分类号: H03F1/0227 , G05F1/468 , G05F1/56 , H03F1/0216 , H03F1/025 , H03F1/0277 , H03F2200/555 , H03G3/3047
摘要: Disclosed is a power control method for a radio frequency power amplifier, comprising the following steps: S1. reading a power source voltage signal and a power control signal and generating an amplified signal having a linear relationship with the power control signal; S2. according to the amplified signal and saturation information, generating one or more controlled currents, merging each controlled current, and converting the merged total current into voltage; S3. Conducting linear voltage regulation on the converted voltage and generating a base control voltage of the radio frequency power amplifier. The present invention dynamically monitors the saturation information of a pass element to change the base voltage of the radio frequency power amplifier, thus improving additional power efficiency of the radio frequency power amplifier at multiple power level and over a large power source voltage range, and improving the properties of the radio frequency switch thereof.
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公开(公告)号:US09831834B2
公开(公告)日:2017-11-28
申请号:US14803355
申请日:2015-07-20
发明人: Florinel G. Balteanu , Jose Alejandro Macedo , Peter Harris Robert Popplewell , Jakub F. Pingot
IPC分类号: H03F3/191 , H03G3/20 , H03F3/04 , H03F1/02 , H03F3/08 , H03F3/195 , H03F3/24 , H03F3/68 , H03F3/72 , H03F3/45 , H02M3/155 , H02M1/00
CPC分类号: H03F1/0216 , H02M3/155 , H02M2001/0045 , H03F1/0222 , H03F1/0227 , H03F1/025 , H03F1/0255 , H03F1/0277 , H03F3/082 , H03F3/195 , H03F3/245 , H03F3/45071 , H03F3/68 , H03F3/72 , H03F2200/102 , H03F2200/111 , H03F2200/429 , H03F2200/504 , H03F2200/511 , H03F2200/555 , H03F2200/78 , H03F2203/7209 , H03F2203/7221 , H03F2203/7236
摘要: A low frequency loss correction circuit that improves the efficiency of a power amplifier at near-DC low frequencies The low frequency loss correction circuit can include a signal error detection circuit configured to produce an error signal in response to detecting one or more frequency components of a tracking signal below a cutoff frequency that are substantially attenuated through a capacitive path. The low frequency loss correction circuit can include a drive circuit configured to convert the error signal into a low frequency correction signal, and provide the low frequency correction signal to a voltage supply line, the low frequency correction signal including at least some of the one or more frequency components of the tracking signal below a cutoff frequency that are substantially attenuated through the capacitive path.
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9.
公开(公告)号:US09813086B2
公开(公告)日:2017-11-07
申请号:US13972924
申请日:2013-08-22
发明人: Chao Lu , Hua Wang , Paul Cheng Po Liang , Sang Won Son
CPC分类号: H04B1/0475 , H03F1/025 , H03F1/0294 , H03F1/3241 , H03F3/195 , H03F3/211 , H03F3/24 , H03F2200/336 , H03F2200/537 , H03F2200/541 , H04B1/0483 , H04B2001/0408 , H04B2001/0425
摘要: A radio frequency (RF) transmitter includes a power amplifier comprising a plurality of power amplifier cells. At least one digital signal processing module of the RF transmitter is operably coupled to the power amplifier and comprises at least one digital pre-distortion component arranged to apply at least one digital pre-distortion codeword to the plurality of power amplifier cells, wherein the at least one digital pre-distortion codeword is applied to at least one of the plurality of power amplifier cells via a digital filter. A combiner is arranged to combine outputs of the plurality of power amplifier cells thereby generating an analogue RF signal for transmission over an RF interface based at least partly on the digitally filtered at least one digital pre-distortion codeword.
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公开(公告)号:US20170214376A1
公开(公告)日:2017-07-27
申请号:US15482543
申请日:2017-04-07
发明人: Udo-Michael Vetter
CPC分类号: H03G11/08 , H03F1/0222 , H03F1/0227 , H03F1/0244 , H03F1/025 , H03F2200/105 , H03F2200/465 , H03G11/04
摘要: In one embodiment, a signal-processing apparatus for generating an amplified output signal based on an input signal is provided. The apparatus comprises: an amplifier configured to generate the output signal, wherein the amplifier is configured to receive a supply voltage; and a limiter configured to inhibit increases in the input signal power level from being applied to the amplifier, wherein the limiter comprises: a variable attenuator configured to selectively attenuate the input signal before being applied to the amplifier; wherein the limiter integrates over a voltage difference between a current measure of attenuated input signal power level and a limiter threshold level to control a level of attenuation applied by the variable attenuator to the input signal.
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