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公开(公告)号：US08676145B2
公开(公告)日：2014-03-18
申请号：US13095544
申请日：2011-04-27
摘要： A balanced mixer circuit (300, 400, 500, 600, 700 and 800) in a baseband receiver (202) includes an oscillator circuit (212), a mixer (214 and 215), a digital-to-analog converter (258 and 259) and a digital signal processor (250). The mixer includes CMOS devices (301, 302, 303 and 304). In response to differential outputs from the mixer, the digital signal processor controls the digital-to-analog converter to output bias voltages for the gate of at least one of the CMOS devices of the mixer to compensate for imbalance in the differential output of the mixer that may be caused by mismatch among two or more CMOS devices of the mixer or caused by other reasons, in order to increase second order intercept point of the mixer.
摘要翻译： 基带接收机（202）中的平衡混频器电路（300,400,500,600,700和800）包括振荡器电路（212），混频器（214和215），数模转换器（258和 259）和数字信号处理器（250）。 混频器包括CMOS器件（301,302,303和304）。 响应于来自混频器的差分输出，数字信号处理器控制数模转换器以输出混频器的至少一个CMOS器件的栅极的偏置电压，以补偿混频器的差分输出的不平衡 这可能是由混频器的两个或更多个CMOS器件之间的失配引起的或由于其他原因引起的，以便增加混频器的二阶截取点。
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公开(公告)号：US20120200334A1
公开(公告)日：2012-08-09
申请号：US13360926
申请日：2012-01-30
IPC分类号： G06G7/16
CPC分类号： H03D7/1466 , H03D7/1441 , H03D7/1458 , H03D7/1491 , H03D7/165 , H03D2200/0084 , H03D2200/0088
摘要： An apparatus comprising a low noise mixer comprising a transconductance amplifier configured to receive a differential voltage and to generate a differential current signal, a passive mixer directly connected to an output of the transconductance amplifier, and a transimpedance amplifier coupled to the passive mixer, wherein the transimpedance amplifier is configured to receive a current signal and convert the current signal to a voltage signal.
摘要翻译： 一种包括低噪声混合器的装置，包括被配置为接收差分电压并产生差分电流信号的跨导放大器，直接连接到跨导放大器的输出的无源混频器以及耦合到无源混频器的跨阻抗放大器，其中， 跨阻放大器被配置为接收电流信号并将电流信号转换为电压信号。
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公开(公告)号：US08010074B2
公开(公告)日：2011-08-30
申请号：US12028720
申请日：2008-02-08
摘要： A balanced mixer circuit (300, 400, 500, 600, 700 and 800) in a baseband receiver (202) includes an oscillator circuit (212), a mixer (214 and 215), a digital-to-analog converter (258 and 259) and a digital signal processor (250). The mixer includes CMOS devices (301, 302, 303 and 304). In response to differential outputs from the mixer, the digital signal processor controls the digital-to-analog converter to output bias voltages for the gate of at least one of the CMOS devices of the mixer to compensate for imbalance in the differential output of the mixer that may be caused by mismatch among two or more CMOS devices of the mixer or caused by other reasons, in order to increase second order intercept point of the mixer.
摘要翻译： 基带接收机（202）中的平衡混频器电路（300,400,500,600,700和800）包括振荡器电路（212），混频器（214和215），数模转换器（258和 259）和数字信号处理器（250）。 混频器包括CMOS器件（301,302,303和304）。 响应于来自混频器的差分输出，数字信号处理器控制数模转换器以输出混频器的至少一个CMOS器件的栅极的偏置电压，以补偿混频器的差分输出的不平衡 这可能是由混频器的两个或更多个CMOS器件之间的失配引起的或由于其他原因引起的，以便增加混频器的二阶截取点。
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公开(公告)号：US07733181B2
公开(公告)日：2010-06-08
申请号：US12154648
申请日：2008-05-23
申请人： Kent Jaeger , Lawrence E. Connell
发明人： Kent Jaeger , Lawrence E. Connell
IPC分类号： H03F3/45
CPC分类号： H03F1/0272 , H03F3/195 , H03F3/45183 , H03F2200/24 , H03F2200/451 , H03F2203/45271 , H03F2203/45292 , H03F2203/45322 , H03F2203/45581 , H03F2203/45612
摘要： Methods and corresponding systems for amplifying an input signal include inputting first and second differential input signals into first and second circuit legs, respectively, wherein the first circuit leg includes a first transistor coupled in series with a first variable current source, and wherein the second circuit leg includes a second transistor coupled in series with a second variable current source. The first and second variable current sources are dynamically set to provide first and second bias currents in response to the first and second differential input signals, wherein the first bias current is set inversely proportional to the second bias current. The first and second bias currents are sunk in the first and second circuit legs, respectively. First and second differential output signals are output from the first and second circuit legs, respectively.
摘要翻译： 用于放大输入信号的方法和相应系统包括分别将第一和第二差分输入信号输入到第一和第二电路支路，其中第一电路支路包括与第一可变电流源串联耦合的第一晶体管，并且其中第二电路 腿包括与第二可变电流源串联耦合的第二晶体管。 动态地设置第一和第二可变电流源以响应于第一和第二差分输入信号提供第一和第二偏置电流，其中第一偏置电流与第二偏置电流成反比地设定。 第一和第二偏置电流分别在第一和第二电路支路中沉没。 第一和第二差分输出信号分别从第一和第二电路支路输出。
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5.发明授权Linear voltage controlled variable attenuator with linear DB/V gain slope 有权具有线性DB / V增益斜率的线性电压控制可变衰减器公开(公告)号：US07505748B2
公开(公告)日：2009-03-17
申请号：US11238657
申请日：2005-09-28
IPC分类号： H04B7/00
CPC分类号： H03G1/007 , H03G3/3063
摘要： A variable attenuator and method of attenuating a signal is presented. The variable attenuator contains an input that receives an input signal to be attenuated. A voltage divider between a resistor and parallel MOSFETs provides the attenuated input signal. The MOSFETs have different sizes and have gates that are connected to a control signal through different resistances such that the larger the MOSFET, the larger the resistance. The control signal is dependent on the output of the attenuator. The arrangement extends the linearity of the attenuation over a wide voltage range of the control signal and decreases the intermodulation distortion of the attenuator.
摘要翻译： 提出了一种衰减信号的可变衰减器和方法。 可变衰减器包含接收要衰减的输入信号的输入端。 电阻和并联MOSFET之间的分压器提供衰减的输入信号。 MOSFET具有不同的尺寸，并且具有通过不同电阻连接到控制信号的栅极，使得MOSFET越大，电阻越大。 控制信号取决于衰减器的输出。 该布置在控制信号的宽电压范围内延伸衰减的线性，并减小衰减器的互调失真。
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公开(公告)号：US20090051441A1
公开(公告)日：2009-02-26
申请号：US11895427
申请日：2007-08-24
IPC分类号： H03F3/191
CPC分类号： H03F3/191 , H03F1/56 , H03F3/45192 , H03F2200/213 , H03F2200/294 , H03F2203/45386 , H03F2203/45544
摘要： Methods and corresponding systems in a low noise amplifier include selecting a selected sub-band for amplifying, wherein the selected sub-band is one of a plurality of sub-bands, wherein each sub-band is a portion of a frequency band, and wherein each sub-band has a corresponding sub-band center frequency. Next, a gate-source capacitor is adjusted so that a real part of an LNA input impedance corresponds to a real part of a source impedance at the selected sub-band center frequency. A match capacitor is also adjusted so that the LNA input impedance corresponds to the complex conjugate of the source impedance at the selected sub-band center frequency. The gate-source capacitor and the match capacitor can each be adjusted by recalling capacitor values from memory that correspond to the selected sub-band, and connecting selected capacitor components in response to the recalled capacitor values.
摘要翻译： 低噪声放大器中的方法和对应系统包括选择用于放大的所选择的子带，其中所选择的子带是多个子带中的一个，其中每个子带是频带的一部分，并且其中 每个子带具有相应的子带中心频率。 接下来，调整栅极 - 源极电容器，使得LNA输入阻抗的实部对应于所选择的子带中心频率处的源极阻抗的实部。 还调整匹配电容器，使得LNA输入阻抗对应于所选子带中心频率处的源阻抗的复共轭。 可以通过从对应于所选择的子带的存储器调用电容器值来调整栅极 - 源极电容器和匹配电容器，并且响应于调用的电容器值连接所选择的电容器部件。
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公开(公告)号：US07332979B2
公开(公告)日：2008-02-19
申请号：US11261978
申请日：2005-10-28
IPC分类号： H03B5/36
摘要： A frequency source having a fast start-up time and low noise in steady state is presented. The frequency source includes an oscillator and a hybrid automatic gain control (AGC) loop that switches between an analog AGC loop at oscillator start up and a digital AGC loop at steady state operation. The analog AGC loop includes a peak detector connected to the oscillator and an error integrator integrating the difference between the peak detector output and a reference voltage. The digital AGC loop includes a comparator comparing the peak detector output and high/low reference voltages, an oscillator counter providing a timer signal, a digital-to-analog converter (DAC) supplied with a digital word, and a low pass filter between the DAC and the oscillator. The timer signal causes a multiplexer to select either the analog AGC loop or the digital AGC loop.
摘要翻译： 提出了一种在稳态下具有快速起动时间和低噪声的频率源。 频率源包括振荡器和混合自动增益控制（AGC）环路，其在振荡器启动时在模拟AGC环路和稳态操作之间的数字AGC环路之间切换。 模拟AGC环路包括连接到振荡器的峰值检测器和积分峰值检测器输出和参考电压之间的差的误差积分器。 数字AGC环路包括比较峰值检测器输出和高/低参考电压的比较器，提供定时器信号的振荡器计数器，提供有数字字的数模转换器（DAC）和在数字字之间的低通滤波器 DAC和振荡器。 定时器信号使多路复用器选择模拟AGC环路或数字AGC环路。
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公开(公告)号：US06621348B2
公开(公告)日：2003-09-16
申请号：US10001388
申请日：2001-10-25
IPC分类号： H03F122
CPC分类号： H03F1/3205 , H03F1/301 , H03F3/19 , H03F2200/72 , H03G1/0023
摘要： A high gain wide-band width RF amplifier 120 with automatic bias supply regulation. The load supply is actively adjusted in response to the amplifier's output signal level. At small output signals effective load supply voltage is minimum and at larger output signals the effective load supply voltages is maximized. The amplifier 120 includes a differential pair of field effect transistors (FETs) 102, 104 connected at common source connection 106 and biased by current bias FET 108 which is connected between common source connection 106 and amplifier signal input RFIN. A bias voltage (VB1) is applied to the gate of bias device 108 and an automatic gain control voltage (VAGC) is applied to the gates of differential FET pair 102, 104. The automatic bias supply circuit 122 is an active load and includes resistors 124, 126, capacitor 128 and a differential amplifier 130. Capacitor 128 is connected between the negative input 132 and the output 134 of differential amplifier 130. A load reference voltage VO is provided to the positive input. Resistor 124 is connected between the output 134 of differential amplifier 130 and the high gain wide-band amplifier output 136 at the drain of FET 104. Resistor 126 is connected between the output 136 at the drain of FET 104 and the negative input 132 to differential amplifier 130 providing amplifier load signal feedback.
摘要翻译： 具有自动偏置电源调节功能的高增益宽带宽RF放大器120。 负载电源根据放大器的输出信号电平进行主动调整。 在小输出信号下，有效负载电源电压最小，而在较大的输出信号下，有效负载电源电压最大化。 放大器120包括在公共源极连接106处连接并由连接在公共源极连接106和放大器信号输入RFIN之间的电流偏置FET 108偏置的差分对的场效应晶体管（FET）102,104。 偏置电压（VB1）被施加到偏置装置108的栅极，并且自动增益控制电压（VAGC）被施加到差分FET对102,104的栅极。自动偏置电源电路122是有源负载，并且包括电阻 124,126，电容器128和差分放大器130.电容器128连接在差分放大器130的负输入端132和输出端134之间。负载基准电压VO被提供给正输入端。 电阻器124连接在差分放大器130的输出134和FET104的漏极之间的高增益宽带放大器输出端136之间。电阻器126连接在FET104的漏极和负输入端132之间的输出端136与差分 放大器130提供放大器负载信号反馈。
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9.发明授权Circuit for minimizing turn-on time of temperature compensated crystal oscillator 失效用于最小化温度补偿晶体振荡器的导通时间的电路
公开(公告)号：US5977840A
公开(公告)日：1999-11-02
申请号：US69581
申请日：1998-04-29
CPC分类号： H03L3/00
摘要： A temperature compensated crystal oscillator with an improved phase noise characteristic and a fast start up time includes a large time constant low-pass filter coupled to a temperature compensation circuit. At start up the low pass filter is effectively bypassed to enable the temperature compensation voltage and oscillator output frequency to settle quickly. A capacitance in the low-pass filter is precharged by a precharge circuit to match the temperature compensation voltage without disturbing the temperature compensation circuit and the concurrent settling of the oscillator. When the capacitance is fully charged, the low-pass filter is enabled without unsettling the oscillator output frequency.
摘要翻译： 具有改善的相位噪声特性和快速启动时间的温度补偿晶体振荡器包括耦合到温度补偿电路的大时间常数低通滤波器。 启动时，低通滤波器被有效地旁路，使得温度补偿电压和振荡器输出频率快速稳定。 低通滤波器中的电容由预充电电路预充电，以匹配温度补偿电压，而不会干扰温度补偿电路和振荡器的同时稳定。 当电容完全充电时，使能低通滤波器，而不会使振荡器输出频率不稳定。
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10.发明授权Method and apparatus for integrating a plurality of analog input signals prior to transmitting a communications signal 失效用于在发送通信信号之前对多个模拟输入信号进行积分的方法和装置
公开(公告)号：US5634202A
公开(公告)日：1997-05-27
申请号：US149486
申请日：1993-11-09
CPC分类号： H03H19/004
摘要： A method and apparatus for integrating a plurality of analog input signals. A first integrator(725) having a first pole frequency integrates a first of the input signals and a second integrator(730) having a second pole frequency different than the first pole frequency integrates a second of the input signals. A summer(735) is connected to the first and second integrators to then sum the integrated first and second signals and provide a composite integrated signal prior to transmitting a communications signal.
摘要翻译： 一种用于集成多个模拟输入信号的方法和装置。 具有积分第一输入信号的第一积分器（725）和具有与第一极点频率不同的第二极点频率的第二积分器（730）积分第二输入信号。 夏天（735）连接到第一和第二积分器，然后对集成的第一和第二信号求和，并在发送通信信号之前提供复合的积分信号。
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