公开(公告)号：US20180197802A1

公开(公告)日：2018-07-12

申请号：US15746013

申请日：2017-03-01

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： MASAYUKI NAGAMATSU ,  SHINYA MARUMO ,  JUNICHI KIMURA ,  TATSUYA KUNISATO ,  RYOSUKE USUI

IPC: H01L23/12 ,  H01L23/28 ,  H01L23/50

CPC classification number: H01L23/12 ,  H01L23/28 ,  H01L23/3107 ,  H01L23/3142 ,  H01L23/48 ,  H01L23/49503 ,  H01L23/49548 ,  H01L23/50

Abstract: A semiconductor device includes a semiconductor element, a base, and an outer packaging resin. The base has a mounting surface, on which the semiconductor element is mounted, and a groove provided around the semiconductor element on the mounting surface. An outer packaging resin covers the semiconductor element and the base, and is fixed to the base by filling the groove. A bottom of the groove includes a first recess-projection having a first amplitude and a first repetition interval along an extending direction of the groove. The first recess-projection includes a second recess-projection having a second amplitude smaller than the first amplitude and a second repetition interval shorter than the first repetition interval along the extending direction of the groove.

公开(公告)号：US20160308072A1

公开(公告)日：2016-10-20

申请号：US15089383

申请日：2016-04-01

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： MASAO UCHIDA ,  KOUICHI SAITOU ,  TAKAYUKI WAKAYAMA ,  MASASHI HAYASHI ,  TATSUYA KUNISATO

IPC: H01L29/872 ,  H01L29/06 ,  H01L29/16

CPC classification number: H01L29/872 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/1608 ,  H01L29/36 ,  H01L29/402 ,  H01L29/6606

Abstract: A semiconductor device according to an aspect of the present disclosure includes a semiconductor substrate having a first conductivity type and having a principal surface and a back surface, a silicon carbide semiconductor layer having the first conductivity type and disposed on the principal surface of the semiconductor substrate, a guard ring region having a second conductivity type and disposed within the silicon carbide semiconductor layer, a floating region having the second conductivity type and disposed within the silicon carbide semiconductor layer, a first electrode disposed on the silicon carbide semiconductor layer, and a second electrode disposed on the back surface of the semiconductor substrate, wherein the guard ring region and the floating region each include a pair of a high-concentration region having the second conductivity type and a low-concentration region having the second conductivity type.

Abstract translation: 根据本公开的一个方面的半导体器件包括具有第一导电类型并具有主表面和背表面的半导体衬底，具有第一导电类型的碳化硅半导体层并且设置在半导体衬底的主表面上 具有第二导电类型并且设置在碳化硅半导体层内的保护环区域，具有第二导电类型的浮动区域并且设置在碳化硅半导体层内，设置在碳化硅半导体层上的第一电极和第二电极 设置在半导体衬底的背面上的电极，其中保护环区域和浮置区域各自包括一对具有第二导电类型的高浓度区域和具有第二导电类型的低浓度区域。