公开(公告)号：US11055499B2

公开(公告)日：2021-07-06

申请号：US16738919

申请日：2020-01-09

Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.

Inventor： Yoshihisa Inagaki ,  Tadashi Ono ,  Isao Kato

IPC: G06K19/06 ,  G06K7/00

Abstract: A card device according to an aspect of the present disclosure includes: a first interface that connects the card device with a host device. The card device notifies, through the first interface, the host device of whether or not the card device includes a second interface different from the first interface.

公开(公告)号：US11782852B2

公开(公告)日：2023-10-10

申请号：US17208354

申请日：2021-03-22

Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.

Inventor： Tadashi Ono ,  Isao Kato ,  Yoshihisa Inagaki ,  Shuichi Ohki

IPC: G06F13/42 ,  G06F13/16

CPC classification number: G06F13/1668 ,  G06F13/4282 ,  G06F2213/0026

Abstract: When a part of a signal line of a first interface and a part of a signal line of a second interface share a signal line and there is a memory connected to both the interfaces, initialization of the second interface and initialization of the memory are executed in parallel following initialization of the first interface.

公开(公告)号：US12117887B2

公开(公告)日：2024-10-15

申请号：US18122977

申请日：2023-03-17

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Tadashi Ono ,  Yoshihisa Inagaki

IPC: G06F1/32 ,  G06F1/04 ,  G06F1/3296

CPC classification number: G06F1/3296 ,  G06F1/04

Abstract: When a host-slave system including a host device and a slave device transitions to a power-down mode, the host device drives a CMD line in order of a high level, a low level, and a high level, and stops supplying a clock signal after a predetermined time elapses. During a power-down mode period, the slave device stops supplying a power to a back-end module. When the host device resumes the supply of the clock signal, the host-slave system returns from the power-down mode.