公开(公告)号：US09935149B2

公开(公告)日：2018-04-03

申请号：US15441568

申请日：2017-02-24

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Mitsuyoshi Mori ,  Ryohei Miyagawa ,  Yoshiyuki Ohmori ,  Yoshihiro Sato ,  Yutaka Hirose ,  Yusuke Sakata ,  Toru Okino

IPC: H01L27/146 ,  H01L27/30

CPC classification number: H01L27/14636 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/1463 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14645 ,  H01L27/307

Abstract: A solid-state imaging device according to the present disclosure includes: a charge storage region that stores a signal charge obtained through photoelectric conversion in a photoelectric conversion film; an amplification transistor that amplifies the signal charge stored in the charge storage region in a corresponding pixel; a contact plug that is electrically connected to the charge storage region and contains a semiconductor material; and a line that is disposed above the contact plug and contains a semiconductor material. The contact plug and the charge storage region are electrically connected, and the contact plug and a gate electrode of the amplification transistor are electrically connected via the line.

公开(公告)号：US10367025B2

公开(公告)日：2019-07-30

申请号：US15850645

申请日：2017-12-21

Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.

Inventor： Yoshihiro Sato ,  Ryohei Miyagawa ,  Tokuhiko Tamaki ,  Junji Hirase ,  Yoshiyuki Ohmori ,  Yoshiyuki Matsunaga

IPC: H01L27/146 ,  H04N5/363 ,  H04N5/378 ,  H01L21/266 ,  H01L21/8234

Abstract: Each unit pixel includes a photoelectric converter, an n-type impurity region forming an accumulation diode together with the semiconductor region, the accumulation diode accumulating a signal charge generated by the photoelectric converter, an amplifier transistor including a gate electrode electrically connected to the impurity region, and an isolation region formed around the amplifier transistor and implanted with p-type impurities. The amplifier transistor includes an n-type source/drain region formed between the gate electrode and the isolation region, and a channel region formed under the gate electrode. A gap in the isolation region is, in a gate width direction, wider at a portion including the channel region than at a portion including the source/drain region.

公开(公告)号：US09627431B2

公开(公告)日：2017-04-18

申请号：US14572046

申请日：2014-12-16

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Mitsuyoshi Mori ,  Ryohei Miyagawa ,  Yoshiyuki Ohmori ,  Yoshihiro Sato ,  Yutaka Hirose ,  Yusuke Sakata ,  Toru Okino

IPC: H01L27/146 ,  H01L27/30

CPC classification number: H01L27/14636 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/1463 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14645 ,  H01L27/307

Abstract: A solid-state imaging device according to the present disclosure includes: a charge storage region that stores a signal charge obtained through photoelectric conversion in a photoelectric conversion film; an amplification transistor that amplifies the signal charge stored in the charge storage region in a corresponding pixel; a contact plug that is electrically connected to the charge storage region and contains a semiconductor material; and a line that is disposed above the contact plug and contains a semiconductor material. The contact plug and the charge storage region are electrically connected, and the contact plug and a gate electrode of the amplification transistor are electrically connected via the line.

公开(公告)号：US09942506B2

公开(公告)日：2018-04-10

申请号：US15720668

申请日：2017-09-29

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Mitsuyoshi Mori ,  Hirohisa Ohtsuki ,  Yoshiyuki Ohmori ,  Yoshihiro Sato ,  Ryohei Miyagawa

IPC: H04N5/378 ,  H01L27/146 ,  H04N5/3745

CPC classification number: H04N5/378 ,  H01L27/14603 ,  H01L27/1461 ,  H01L27/1464 ,  H01L27/14645 ,  H04N5/3745

Abstract: A solid-state imaging device according to the present disclosure includes pixels arranged two-dimensionally, each of the pixels including: a metal electrode; a photoelectric conversion layer that is on the metal electrode and converts light into an electrical signal; a transparent electrode on the photoelectric conversion layer; an electric charge accumulation region that is electrically connected to the metal electrode and accumulates electric charges from the photoelectric conversion layer; an amplifier transistor that applies a signal voltage according to an amount of the electric charges in the electric charge accumulation region; and a reset transistor that resets electrical potential of the electric charge accumulation region, in which the reset transistor includes a gate oxide film thicker than a gate oxide film of the amplifier transistor.

公开(公告)号：US09881960B2

公开(公告)日：2018-01-30

申请号：US14556093

申请日：2014-11-28

Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.

Inventor： Yoshihiro Sato ,  Ryohei Miyagawa ,  Tokuhiko Tamaki ,  Junji Hirase ,  Yoshiyuki Ohmori ,  Yoshiyuki Matsunaga

IPC: H01L27/146 ,  H04N5/363 ,  H04N5/378 ,  H01L21/266 ,  H01L21/8234

CPC classification number: H01L27/14643 ,  H01L21/266 ,  H01L21/823456 ,  H01L21/823481 ,  H01L27/14609 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/1463 ,  H01L27/14665 ,  H01L27/14689 ,  H04N5/363 ,  H04N5/378

Abstract: Each unit pixel includes a photoelectric converter, an n-type impurity region forming an accumulation diode together with the semiconductor region, the accumulation diode accumulating a signal charge generated by the photoelectric converter, an amplifier transistor including a gate electrode electrically connected to the impurity region, and an isolation region formed around the amplifier transistor and implanted with p-type impurities. The amplifier transistor includes an n-type source/drain region formed between the gate electrode and the isolation region, and a channel region formed under the gate electrode. A gap in the isolation region is, in a gate width direction, wider at a portion including the channel region than at a portion including the source/drain region.

公开(公告)号：US09813651B2

公开(公告)日：2017-11-07

申请号：US14579592

申请日：2014-12-22

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Mitsuyoshi Mori ,  Hirohisa Ohtsuki ,  Yoshiyuki Ohmori ,  Yoshihiro Sato ,  Ryohei Miyagawa

IPC: H04N5/335 ,  H04N3/14 ,  H04N5/378 ,  H01L27/146 ,  H04N5/3745

CPC classification number: H04N5/378 ,  H01L27/14603 ,  H01L27/1461 ,  H01L27/1464 ,  H01L27/14645 ,  H04N5/3745

Abstract: A solid-state imaging device according to the present disclosure includes pixels arranged two-dimensionally, each of the pixels including: a metal electrode; a photoelectric conversion layer that is on the metal electrode and converts light into an electrical signal; a transparent electrode on the photoelectric conversion layer; an electric charge accumulation region that is electrically connected to the metal electrode and accumulates electric charges from the photoelectric conversion layer; an amplifier transistor that applies a signal voltage according to an amount of the electric charges in the electric charge accumulation region; and a reset transistor that resets electrical potential of the electric charge accumulation region, in which the reset transistor includes a gate oxide film thicker than a gate oxide film of the amplifier transistor.