Multiplexing device including a hardwired multiplexer in a programmable logic device
    1.
    发明授权
    Multiplexing device including a hardwired multiplexer in a programmable logic device 有权
    多路复用器件包括可编程逻辑器件中的硬连线多路复用器

    公开(公告)号:US07253660B1

    公开(公告)日:2007-08-07

    申请号:US10305886

    申请日:2002-11-27

    IPC分类号: H01L25/00 H03K19/177

    CPC分类号: H03K17/002

    摘要: A multiplexing device is described. In one embodiment, the multiplexing device includes: a hardwired multiplexer including a plurality of input terminals; a plurality of select terminals; and at least one output terminal, where the plurality of input terminals are coupled to a plurality of block input lines or a plurality of functional element input terminals. In one embodiment, the plurality of input terminals are hardwired to the plurality of block input lines or the plurality of functional element input terminals. In one embodiment, the plurality of select terminals are coupled to a second plurality of functional element input terminals or a plurality of functional element output terminals. In one embodiment, the plurality of block input lines include a plurality of logic array block (LAB) lines, the plurality of functional element input terminals include a plurality of logic element (LE) input terminals, and the plurality of functional element output terminals include LE output terminals. In another embodiment the multiplexing device includes: a hardwired multiplexer including a plurality of data signal input terminals; and a first plurality of LEs including a first plurality of LE output terminals, where the plurality of data signal input terminals are coupled to the first plurality of LE output terminals.

    摘要翻译: 描述多路复用装置。 在一个实施例中,多路复用装置包括:硬连线多路复用器,包括多个输入端; 多个选择端子; 以及至少一个输出端子,其中多个输入端子耦合到多个块输入线或多个功能元件输入端子。 在一个实施例中,多个输入端子被硬连线到多个块输入线或多个功能元件输入端子。 在一个实施例中,多个选择端子耦合到第二多个功能元件输入端子或多个功能元件输出端子。 在一个实施例中,多个块输入线包括多个逻辑阵列块(LAB)线,多个功能元件输入端包括多个逻辑元件(LE)输入端,多个功能元件输出端包括 LE输出端子。 在另一实施例中,多路复用装置包括:硬连线多路复用器,包括多个数据信号输入端; 以及包括第一多个LE输出端子的第一多个LE,其中所述多个数据信号输入端子耦合到所述第一多个LE输出端子。