MANUFACTURING METHOD OF CHARGING CAPACITY STRUCTURE
    1.
    发明申请
    MANUFACTURING METHOD OF CHARGING CAPACITY STRUCTURE 有权
    充电能力结构的制造方法

    公开(公告)号:US20130130463A1

    公开(公告)日:2013-05-23

    申请号:US13301255

    申请日:2011-11-21

    IPC分类号: H01L21/02

    CPC分类号: H01L28/92 H01L27/1085

    摘要: A method of manufacturing a charging capacity structure includes steps of: forming a first oxide layer, a support layer and a second oxide layer on a substrate in sequence; forming a plurality of etching holes on the surface of the second oxide layer in a matrix to run through the substrate that are spaced from each other at a selected distance; forming a plurality of pillar layers in the etching holes; removing the second oxide layer by etching; forming an etching protection layer on the surfaces of the support layer and pillar tubes that is formed at a thickness one half of the spaced distance between the etching holes such that the pillar tubes at diagonal locations form a self-calibration hole; and finally removing the first oxide layer from the self-calibration hole by etching. Through the self-calibration hole, the invention needn't to provide extra photoresists to form holes.

    摘要翻译: 制造充电容量结构的方法包括以下步骤:依次在基板上形成第一氧化物层,支撑层和第二氧化物层; 在所述第二氧化物层的表面上以矩阵形成多个蚀刻孔以穿过所述基板,所述蚀刻孔以选定距离彼此间隔开; 在蚀刻孔中形成多个柱层; 通过蚀刻去除第二氧化物层; 在支撑层和支柱管的表面上形成蚀刻保护层,其形成为蚀刻孔之间间隔距离的一半的厚度,使得在对角线位置处的柱管形成自校准孔; 最后通过蚀刻从自校准孔中除去第一氧化物层。 通过自校准孔,本发明不需要提供额外的光致抗蚀剂来形成孔。

    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    2.
    发明申请
    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
    制造半导体器件的方法

    公开(公告)号:US20110086477A1

    公开(公告)日:2011-04-14

    申请号:US12902812

    申请日:2010-10-12

    申请人: Masahiko OHUCHI

    发明人: Masahiko OHUCHI

    IPC分类号: H01L21/8238 H01L21/311

    摘要: A semiconductor device manufacturing method may include the following processes. A semiconductor substrate is partially removed using a first insulating film having first and second portions as a mask to form first and second pillars of the semiconductor substrate. A second insulating film is formed on side surfaces of the first and second pillars. A silicon film is formed on the first and second insulating films. A first part of the silicon film, which is on upper surfaces of the first and second portions, is removed. A coating film, which covers the upper surfaces of the first and second portions, is formed over the semiconductor substrate. The coating film is partially removed to expose the first insulating film and a second part of the silicon film. The second part is on side surfaces of the first and second portions. The second part is removed by dry etching.

    摘要翻译: 半导体器件制造方法可以包括以下处理。 使用具有第一和第二部分作为掩模的第一绝缘膜部分地去除半导体衬底,以形成半导体衬底的第一和第二柱。 在第一和第二支柱的侧表面上形成第二绝缘膜。 在第一和第二绝缘膜上形成硅膜。 去除第一和第二部分的上表面上的硅膜的第一部分。 覆盖半导体衬底上的第一和第二部分的上表面的涂膜。 部分去除涂膜以暴露第一绝缘膜和第二部分硅膜。 第二部分在第一和第二部分的侧表面上。 第二部分通过干蚀刻去除。

    SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
    3.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF 有权
    半导体存储器件及其制造方法

    公开(公告)号:US20080185683A1

    公开(公告)日:2008-08-07

    申请号:US12024068

    申请日:2008-01-31

    申请人: Masahiko OHUCHI

    发明人: Masahiko OHUCHI

    IPC分类号: H01L21/8242 H01L27/108

    摘要: A semiconductor memory device includes diffusion regions formed in an active region; cell contacts connected to the diffusion regions, respectively; pillars connected to the cell contacts, respectively; a bit line connected to the pillar; capacitor contacts connected to the pillars, respectively; and storage capacitors connected to the capacitor contacts, respectively. Accordingly, the pillars exist between the cell contacts and the capacitor contacts, and thus, depths of the capacitor contacts are made correspondingly shorter. Therefore, it becomes possible to prevent occurrence of shorting defects while decreasing resistance values of the capacitor contacts.

    摘要翻译: 半导体存储器件包括形成在有源区中的扩散区域; 分别连接到扩散区的电池触点; 支柱分别连接到电池触点; 连接到支柱的位线; 电容器触点分别连接到支柱; 和分别连接到电容器触点的存储电容器。 因此,电池触点和电容器触点之间存在支柱,因此使电容器触点的深度相应地更短。 因此,可以防止短路缺陷的发生,同时降低电容器触点的电阻值。

    ELECTRODE STRUCTURE, METHOD OF FABRICATING THE SAME, AND SEMICONDUCTOR DEVICE
    4.
    发明申请
    ELECTRODE STRUCTURE, METHOD OF FABRICATING THE SAME, AND SEMICONDUCTOR DEVICE 审中-公开
    电极结构,其制造方法和半导体器件

    公开(公告)号:US20110217824A1

    公开(公告)日:2011-09-08

    申请号:US13037811

    申请日:2011-03-01

    申请人: Masahiko OHUCHI

    发明人: Masahiko OHUCHI

    IPC分类号: H01L21/02

    CPC分类号: H01L21/02

    摘要: A method for fabricating a semiconductor device includes the following processes. A first groove is formed in a first insulating film. A first conductive film is formed on inner surfaces of the first groove. A second groove is formed in the first insulating film to remove a part of the first conductive film. The second groove intersects the first groove.

    摘要翻译: 一种制造半导体器件的方法包括以下处理。 在第一绝缘膜中形成第一凹槽。 第一导电膜形成在第一凹槽的内表面上。 在第一绝缘膜中形成第二凹槽以去除第一导电膜的一部分。 第二凹槽与第一凹槽相交。