Digital time base corrector oscillators
    1.
    发明授权
    Digital time base corrector oscillators 失效
    数字时基校正器振荡器

    公开(公告)号:US3971063A

    公开(公告)日:1976-07-20

    申请号:US558090

    申请日:1975-03-13

    IPC分类号: H04N9/896 H04N5/76

    CPC分类号: H04N9/896

    摘要: The television digital time base corrector for television equipment comprises an analogue to digital converter for receiving a video analogue signal, a store for receiving the successive line information in digital form from the output of the analogue to digital converter, a digital to analogue converter for receiving the stored signal, a read/write control circuit for writing the digital information into the store, an input oscillator for determining the rate of conversion of the analogue signal and the rate of writing into the store and output oscillator for controlling the rate of reading out of the digital information from the store and the rate of conversion of the digital information in the store. The input oscillator is in the form of a triggered oscillator which is switched on and off in time relationship with the video sync pulse and/or sub-carrier color burst, the period of switching on and off and the frequency of the oscillator being dependent upon the duration of the lines. Thus the length of the train of sampling clock pulses is varied in sympathy with the off-tape line period by changing the frequency of the clock pulses from line to line.

    摘要翻译: 用于电视设备的电视数字时基校正器包括用于接收视频模拟信号的模拟 - 数字转换器,用于从模数转换器的输出接收数字形式的连续行信息的存储器,用于接收的数模转换器 所存储的信号,用于将数字信息写入存储器的读/写控制电路,用于确定模拟信号的转换速率的输入振荡器和用于控制读出速率的存储和输出振荡器的写入速率 来自商店的数字信息和商店中数字信息的转换率。 输入振荡器是触发振荡器的形式,其与视频同步脉冲和/或副载波色同步时间关系开启和关闭,开关周期和振荡器的频率取决于 线的持续时间。 因此,通过将时钟脉冲的频率从一行改变到另一行,采样时钟脉冲串的长度与离线线路周期的同时变化。

    Digital shift registers for video storage
    2.
    发明授权
    Digital shift registers for video storage 失效
    用于视频存储的数字移位寄存器

    公开(公告)号:US4035832A

    公开(公告)日:1977-07-12

    申请号:US605356

    申请日:1975-08-18

    CPC分类号: G06F5/16 H04N11/042 H04N9/896

    摘要: A method of storing digital information comprising applying the information in the form of coded pulses to an input of at least one register by means of clock pulses and shifting the information within the register by additional clock pulses between writing in and reading out the information. The number of additional pulses applied is equal to the difference between the total register length and the number of clock pulses used to enter the coded pulses, whereby the information within the register is available to be read out on application of read out pulses to the register.

    摘要翻译: 一种存储数字信息的方法,包括借助于时钟脉冲将编码脉冲形式的信息应用于至少一个寄存器的输入,并且在写入和读出信息之间通过附加的时钟脉冲移位寄存器内的信息。 施加的附加脉冲的数量等于总寄存器长度与用于进入编码脉冲的时钟脉冲数之间的差值,由此寄存器中的信息可用于在向寄存器施加读出脉冲时被读出 。

    Component cabinet
    3.
    发明授权
    Component cabinet 失效
    组件柜

    公开(公告)号:US4014598A

    公开(公告)日:1977-03-29

    申请号:US574841

    申请日:1975-05-05

    CPC分类号: H05K7/20572

    摘要: A free standing component cabinet capable of being rapidly reconverted to allow rack mounting thereof. The cabinet comprises a frame normally used for rack mounting which frame includes front rear and side walls and front mounting flanges having holes therein for securing the frame when mounted in a rack. Detachable top and bottom panels enclose the frame. Detachable face plates are mounted one on each of the side walls and abut the front mounting flange. These face plates provide an air duct to allow air to pass from the frame interior to the rear of the cabinet via a vent hole provided in at least one of the side plates. A fan assists the passage of air through the cabinet.

    摘要翻译: 一个独立的组件机柜,能够快速重新转换以允许机架安装。 机柜包括通常用于机架安装的框架,该框架包括前后侧壁和侧壁,并且前安装凸缘在其中具有用于在安装在机架中时固定框架的孔。 可拆卸的顶部和底部面板封闭框架。 可拆卸面板一个安装在每个侧壁上,并邻接前安装法兰。 这些面板提供空气管道,以允许空气通过设置在至少一个侧板中的通气孔从框架内部传递到机柜的后部。 风扇有助于空气通过柜体。

    Cross-talk reduction in semiconductor memory device
    5.
    发明授权
    Cross-talk reduction in semiconductor memory device 失效
    半导体存储器件中的串扰减少

    公开(公告)号:US3983410A

    公开(公告)日:1976-09-28

    申请号:US583145

    申请日:1975-06-02

    CPC分类号: G11C19/00

    摘要: The memory circuit comprises a semiconductor shift register and means for effecting two phase clocking of the digital information through the shift register. Transformer means are provided for inducing a controlled amount of cross-talk in each of the two phases in the opposite sense to cross-talk generated by capacitive components present in the shift register whereby the induced cross-talk substantially cancels out the capacitive generated cross-talk.

    摘要翻译: 存储器电路包括半导体移位寄存器和用于通过移位寄存器实现数字信息的两相时钟的装置。 提供变压器装置,用于在相反意义上的两相中的每一个中引起受控量的串扰,以便由存在于移位寄存器中的电容分量产生的串扰进行串扰,由此,感应串扰基本上抵消电容产生的交叉, 谈论。

    Digital time base correctors for television equipment
    6.
    发明授权
    Digital time base correctors for television equipment 失效
    电视设备数字时基校正器

    公开(公告)号:US3978519A

    公开(公告)日:1976-08-31

    申请号:US558091

    申请日:1975-03-13

    IPC分类号: H04N9/896 H04N5/76 H04N9/46

    CPC分类号: H04N9/896

    摘要: The television digital time base corrector comprises an analogue to digital converter for receiving a video analogue signal, a store for receiving the successive line information in digital form from the output of the analogue to digital converter, a digital to analogue converter for receiving the stored signal, a read/write control circuit for writing the digital information into said store, an input oscillator for determining the rate of conversion of the analogue signal and the rate of writing the store, and an output oscillator for controlling the rate of reading out of the digital information from the store and the rate of conversion of the digital information in the store. The input oscillator is in the form of a triggered oscillator which is switched on and off in timed relationship with the video sync pulse and/or sub-carrier color burst. The oscillator thus commences its pulse generation at a time which is directly related to the timing of the sync pulse.The oscillator is of a fixed frequency and produces a series of pulses sufficient to allow all the incoming video information in one line to be converted and then stops oscillating. The oscillator is retriggered by the next start pulse derived from the incoming sync pulse information.

    Drop out compensation system
    7.
    发明授权
    Drop out compensation system 失效
    放弃补偿制度

    公开(公告)号:US3949416A

    公开(公告)日:1976-04-06

    申请号:US503586

    申请日:1974-09-05

    IPC分类号: H04N9/882 H04N5/76 G11B5/09

    CPC分类号: H04N9/882

    摘要: The drop out compensation system comprising input means for accepting a colour or monochrome picture information signal, output means, a drop out compensating signal generator, switch means for effecting connection of said input means to said compensating signal generator and for effecting connection between said compensating signal generator and said output means, and a drop out detector for effecting switching of said switch means, said compensating signal generator including delay means for providing a delayed output signal of the information signal entering the delay means, adder means for summing the information arriving simultaneously at the delay means and said delayed output, means for reducing the level of the signal from the compensating signal generator so that the low frequency luminance level of said resulting compensating signal at said output means has a value the same as that in the colour picture information signal at the input means, and storage means for effecting a delay within the compensating signal generator equal to at least one scanning line time. The resulting compensating signal at said output means has the correct luminance and hue values, but with a reduced saturation value. The compensating signal on the occurrence of a drop out is fed into the picture line being scanned at the correct time and in the correct phase relationship.

    摘要翻译: 该退出补偿系统包括用于接受彩色或单色图像信息信号的输入装置,输出装置,丢弃补偿信号发生器,用于实现所述输入装置连接到所述补偿信号发生器的开关装置,以及用于实现所述补偿信号 发生器和所述输出装置,以及用于实现所述开关装置的切换的掉电检测器,所述补偿信号发生器包括用于提供进入延迟装置的信息信号的延迟输出信号的延迟装置,用于将同时到达的信息相加的加法器装置 延迟装置和所述延迟输出,用于降低来自补偿信号发生器的信号电平的装置,使得在所述输出装置处的所得到的补偿信号的低频亮度电平具有与彩色图像信息信号中相同的值 在输入装置上,以及用于实现a的存储装置 补偿信号发生器内的延迟等于至少一个扫描线时间。 在所述输出装置处产生的补偿信号具有正确的亮度和色调值,但具有降低的饱和度值。 在出现发生的补偿信号被馈送到在正确的时间和正确的相位关系被扫描的图像行中。

    Stackable electronic equipment assembly with improved circuit board
cooling arrangement
    8.
    发明授权
    Stackable electronic equipment assembly with improved circuit board cooling arrangement 失效
    可堆叠电子设备组件,具有改进的电路板冷却布置

    公开(公告)号:US5663868A

    公开(公告)日:1997-09-02

    申请号:US528166

    申请日:1995-09-14

    IPC分类号: H05K7/14 H05K7/20

    CPC分类号: H05K7/20563

    摘要: A cabinet for electronic equipment comprises an array of printed circuit boards stacked in horizontal planes. The circuit boards are interconnected by a vertically extending rear mother board, and the cabinet includes a plenum chamber defined by a partition having a plurality of vertically arrayed ventilation openings through which air can be drawn from the lateral spaces between the circuit boards and exhausted from the rear of the cabinet by a blower.

    摘要翻译: 电子设备的机柜包括堆放在水平面上的印刷电路板阵列。 电路板通过垂直延伸的后母板互连,并且机柜包括由具有多个垂直排列的通风开口的隔板限定的增压室,空气可以从电路板之间的侧向空间抽出并从 机柜后部由鼓风机组成。

    High speed digital information storage system
    9.
    发明授权
    High speed digital information storage system 失效
    高速数字信息存储系统

    公开(公告)号:US4037203A

    公开(公告)日:1977-07-19

    申请号:US608082

    申请日:1975-08-27

    CPC分类号: G06F5/16 G11C19/188 H04N5/956

    摘要: A high speed digital information storage system comprising means for providing n successive samples of serial data on n parallel paths coincident in time. Holding means are provided for holding the samples prior to storage. Storage means store the serial data samples and means are provided which skew and remultiplex the serial data at the output of the storage means when removed from the storage means. Clocking means provide clocking pulses to the holding means and the storage means in unison at one nth of the serial data rate.

    摘要翻译: 一种高速数字信息存储系统,包括用于在时间上重合的n个并行路径上提供n个连续采样的串行数据的装置。 提供保持装置用于在存储之前保持样品。 存储装置存储串行数据样本,并且提供在从存储装置移除时在存储装置的输出处对串行数据进行偏斜和重新多路复用的装置。 时钟装置在串行数据速率的第n个时刻向保持装置和存储装置提供时钟脉冲。

    Input oscillators for time base correctors
    10.
    发明授权
    Input oscillators for time base correctors 失效
    时基校正器的输入振荡器

    公开(公告)号:US3990103A

    公开(公告)日:1976-11-02

    申请号:US584544

    申请日:1975-06-06

    IPC分类号: H04N9/896 H04N5/76

    CPC分类号: H04N9/896

    摘要: An input oscillator for use in a digital time base corrector comprising a triggered oscillator circuit and a variable period delay device having a first input for receiving the synchronizing pulse and for producing an output pulse whose back edge coincides approximately in time with the center of the filtered colour burst. A select burst transition device has an input connected to the delay device and an output for triggering the oscillator circuit. A window circuit has an output connected to a second input of the delay device. A pulse former is provided controlled from the trailing edge of the output of the delay device. The bistable window circuit effects change of the delay period of the delay device when the output of the pulse former coincides in the window circuit with a burst transition whereby the trailing edge of the output of the delay device is made to occur between burst transitions.

    摘要翻译: 一种用于数字时基校正器的输入振荡器,包括触发振荡器电路和可变周期延迟器件,所述可变周期延迟器件具有用于接收同步脉冲的第一输入端,并用于产生输出脉冲,其输出脉冲的时间上与滤波器的中心大致相同 颜色爆裂。 选择突发转换装置具有连接到延迟装置的输入端和用于触发振荡器电路的输出端。 窗口电路具有连接到延迟装置的第二输入端的输出端。 从延迟装置的输出的后沿控制脉冲形成器。 当脉冲形成器的输出在窗口电路中与脉冲串转变相一致时,双稳态窗口电路实现延迟器件的延迟周期的变化,由此使延迟器件的输出的后沿在突发转换之间发生。