Cache management policy and corresponding device
    1.
    发明授权
    Cache management policy and corresponding device 有权
    缓存管理策略及相应的设备

    公开(公告)号:US08732409B2

    公开(公告)日:2014-05-20

    申请号:US13129751

    申请日:2009-11-16

    IPC分类号: G06F12/02 G06F12/08

    CPC分类号: G06F12/0804 G06F2212/1044

    摘要: A cache management policy is provided, comprising a method for writing back to a memory (104) a data element set (122) stored in a cache (110). The method reduces the time some items stay in the cache, and thereby improves the utilization of the cache for some applications, especially for video applications. The method comprises determining that each one of the multiple data elements has been updated through at least one write request; marking the data element set as a write-back candidate, in dependency on said determination; and writing the write-back candidate to the memory.

    摘要翻译: 提供了一种缓存管理策略,包括用于将存储在高速缓存(110)中的数据元素组(122)的存储器(104)写回的方法。 该方法减少了某些项目停留在缓存中的时间,从而提高了某些应用程序的缓存的利用率,特别是对于视频应用程序。 该方法包括通过至少一个写入请求确定多个数据元素中的每一个已被更新; 根据所述确定将数据元素标记为回写候选者; 并将写回候选者写入存储器。

    CACHE MANAGEMENT POLICY AND CORRESPONDING DEVICE
    2.
    发明申请
    CACHE MANAGEMENT POLICY AND CORRESPONDING DEVICE 有权
    缓存管理政策及相关设备

    公开(公告)号:US20110246723A1

    公开(公告)日:2011-10-06

    申请号:US13129751

    申请日:2009-11-16

    IPC分类号: G06F12/08

    CPC分类号: G06F12/0804 G06F2212/1044

    摘要: A cache management policy is provided, comprising a method for writing back to a memory (104) a data element set (122) stored in a cache (110). The method reduces the time some items stay in the cache, and thereby improves the utilization of the cache for some applications, especially for video applications. The method comprises determining that each one of the multiple data elements has been updated through at least one write request; marking the data element set as a write-back candidate, in dependency on said determination; and writing the write-back candidate to the memory.

    摘要翻译: 提供了一种缓存管理策略,包括用于将存储在高速缓存(110)中的数据元素组(122)的存储器(104)写回的方法。 该方法减少了某些项目停留在缓存中的时间,从而提高了某些应用程序的缓存的利用率,特别是对于视频应用程序。 该方法包括通过至少一个写入请求确定多个数据元素中的每一个已被更新; 根据所述确定将数据元素标记为回写候选者; 并将写回候选者写入存储器。

    Video processing circuit and method of video processing
    3.
    发明授权
    Video processing circuit and method of video processing 失效
    视频处理电路及视频处理方法

    公开(公告)号:US07706377B2

    公开(公告)日:2010-04-27

    申请号:US10591390

    申请日:2005-02-25

    IPC分类号: H04L12/28

    摘要: Video stream processing, such as processing that includes MPEG decoding an subsequent post-processing involves using signal processing circuitry (102, 106) to execute a first and a second video stream processing function. The first video stream processing function produces frame data of successive video frames in a temporally ordered output sequence of frames. The second video stream processing function uses the frame data in an ordered input sequence of frames that differs from the output sequence, for example because later P-frames are needed to decode B frames. The frame data is buffered between application of the first and second video processing function to the frame data. A first and a second. buffer memory (12, 106) are used. The first buffer memory (12) is coupled to the signal processing circuitry via a shareable channel (15) such as an external IC terminals, but the processing circuitry does not use the shareable channel (15) to access the second buffer memory (106). The second video processing function reads frame data from first and second ones of the frames selectively from the first and second buffer memory (12, 106) respectively. The second ones of the frames occur in the same temporal order in both the input and output sequence. The first ones of the frames contain at least all particular frames whose position relative to the second ones of the frames in the output sequence differs from the position of the particular frames relative to the second ones of the frames in the input sequence.

    摘要翻译: 诸如包括MPEG解码后续后处理的视频流处理涉及使用信号处理电路(102,106)来执行第一和第二视频流处理功能。 第一视频流处理功能在时间有序的输出帧序列中产生连续视频帧的帧数据。 第二视频流处理功能使用与输出序列不同的帧的有序输入序列中的帧数据,例如因为需要稍后的P帧来解码B帧。 帧数据在第一和第二视频处理功能的应用与帧数据之间被缓冲。 第一和第二。 使用缓冲存储器(12,106)。 第一缓冲存储器(12)经由诸如外部IC端子之类的共享通道(15)耦合到信号处理电路,但处理电路不使用可共享通道(15)访问第二缓冲存储器(106) 。 第二视频处理功能分别从第一和第二缓冲存储器(12,106)中选择性地从第一和第二帧中读取帧数据。 帧中的第二帧在输入和输出序列中以相同的时间顺序发生。 帧中的第一帧包含至少所有特定帧,其相对于输出序列中的第二帧的位置与特定帧相对于输入序列中的第二帧的位置不同。

    Signal processing device for providing multiple output images in one pass
    5.
    发明授权
    Signal processing device for providing multiple output images in one pass 有权
    用于在一次通过中提供多个输出图像的信号处理装置

    公开(公告)号:US07262807B2

    公开(公告)日:2007-08-28

    申请号:US10495947

    申请日:2002-10-28

    IPC分类号: H04N7/01 H04N11/20

    CPC分类号: H04N7/014 H04N5/145 H04N7/012

    摘要: Signal processing device for providing multiple output images by processing input images of an interlaced video signal, comprising a temporal interpolater circuit (18) and a memory buffer (26, 27) connected to the temporal interpolater circuit. The memory buffer (26, 27)is arranged for storing at least part of a previous input image (11, 13) and a current input image (12). The temporal interpolater circuit (18) is arranged for receiving at least the previous and current input image from the memory buffer (26, 27) and for providing multiple interlaced or de-interlaced frame data (15) at temporal positions between the previous input image temporal position and the current input image temporal position.

    摘要翻译: 信号处理装置,用于通过处理隔行视频信号的输入图像来提供多个输出图像,包括连接到时间插值器电路的时间内插器电路(18)和存储器缓冲器(26,27)。 存储缓冲器(26,27)被布置用于存储先前输入图像(11,13)和当前输入图像(12)的至少一部分。 时间内插器电路(18)被布置用于从存储器缓冲器(26,27)至少接收先前和当前输入图像,并且用于在先前输入图像之间的时间位置处提供多个隔行扫描或去隔行扫描帧数据(15) 时间位置和当前输入图像的时间位置。

    Facilitating motion estimation
    6.
    发明授权
    Facilitating motion estimation 失效
    促进运动估计

    公开(公告)号:US07023920B2

    公开(公告)日:2006-04-04

    申请号:US10078953

    申请日:2002-02-19

    IPC分类号: H04N7/12

    CPC分类号: H04N7/014 H04N5/145

    摘要: An apparatus and method for facilitating a subsequent choice of a motion vector from a plurality of candidate motion vectors in a motion estimation method, include receiving video image data from first, second and third consecutive groups (10, 20, 30) of image data. A first image part (12) of the first group of image data (10), a second image part (22) of the second group of image data (20), and a third image part (32) of the third group of image data (30) are identified, wherein the positions of the three image parts (12, 22, 32) correspond to a motion trajectory that is indicated by a candidate motion vector. A first error measure is then calculated by testing for differences between the first image part (12) and the third image part (32) and quantified as a first error measure. A second error measure is calculated by testing for differences between either the first image part (12) and the second image part (22) or the second image part and the third image part and quantified as a second error measure. An output error measure is then quantified, wherein the output error measure is derived from either the first or the second or a combination of both error measures.

    摘要翻译: 一种用于便于在运动估计方法中从多个候选运动矢量中随后选择运动矢量的装置和方法包括从图像数据的第一,第二和第三连续组(10,20,30)接收视频图像数据。 第一组图像数据(10)的第一图像部分(12),第二组图像数据(20)的第二图像部分(22)和第三组图像的第三图像部分(32) 识别数据(30),其中三个图像部分(12,22,32)的位置对应于由候选运动矢量指示的运动轨迹。 然后通过测试第一图像部分(12)和第三图像部分(32)之间的差异并量化为第一误差测量来计算第一误差测量。 通过测试第一图像部分(12)和第二图像部分(22)或第二图像部分和第三图像部分之间的差异并被量化为第二误差测量来计算第二误差测量。 然后量化输出误差测量,其中输出误差测量从第一或第二或两个误差测量的组合导出。

    Cost Effective Rendering for 3D Displays
    7.
    发明申请
    Cost Effective Rendering for 3D Displays 有权
    3D显示器的成本有效渲染

    公开(公告)号:US20080252638A1

    公开(公告)日:2008-10-16

    申请号:US11913877

    申请日:2006-05-02

    IPC分类号: H04N13/00

    摘要: A method and apparatus for rendering image data on a 3D display is disclosed. A first image signal is received and then at least one colour component of the first image signal is rendered in reduced spatial resolution to produce a second image signal. The second image signal is spatial filtered wherein spatial errors and view errors are balanced when reconstructing a full resolution signal for the display.

    摘要翻译: 公开了一种用于在3D显示器上渲染图像数据的方法和装置。 接收第一图像信号,然后以降低的空间分辨率渲染第一图像信号的至少一个颜色分量以产生第二图像信号。 第二图像信号是空间滤波的,其中当重建用于显示器的全分辨率信号时,空间误差和视图误差是平衡的。

    Image processor and image display apparatus provided with such image processor
    8.
    发明授权
    Image processor and image display apparatus provided with such image processor 失效
    具有这种图像处理器的图像处理器和图像显示装置

    公开(公告)号:US07010042B2

    公开(公告)日:2006-03-07

    申请号:US10234784

    申请日:2002-09-04

    IPC分类号: H04N7/12

    CPC分类号: H04N19/51

    摘要: The image processor (101) for motion compensated image processing comprises a motion compensation unit (106) for calculating an output image based on a particular motion vector field and based on a first input image and a second input image. The particular motion vector field can be calculated by a motion estimator (104) which is part of the image processor (101) or by an external unit (108). The image processor (101) is designed to select from which source, i.e. the motion estimator (104) or the external unit (108), the particular motion vector field is taken to calculate the output image. The external source is designed to calculate the particular motion vector field based on a motion vector field which was provided by the motion estimator (104) of the image processor (101).

    摘要翻译: 用于运动补偿图像处理的图像处理器(101)包括用于基于特定运动矢量场并基于第一输入图像和第二输入图像计算输出图像的运动补偿单元(106)。 特定运动矢量场可以由作为图像处理器(101)的一部分的运动估计器(104)或外部单元(108)计算。 图像处理器(101)被设计为从哪个源(即,运动估计器(104)或外部单元(108))选择特定运动矢量场来计算输出图像。 外部源被设计为基于由图像处理器(101)的运动估计器(104)提供的运动矢量场来计算特定运动矢量场。

    Processor provided with a slow-down facility through programmed stall cycles
    9.
    发明授权
    Processor provided with a slow-down facility through programmed stall cycles 有权
    处理器通过编程失速循环提供了一个减速设备

    公开(公告)号:US06917365B2

    公开(公告)日:2005-07-12

    申请号:US10207507

    申请日:2002-07-29

    摘要: A processor executes image processing under control of a clock facility, such that a sequence of C effective clock cycles will effect a processing operation of a predetermined amount of image information. In particular, the processor has programming means for implementing programmable stall clock cycles interspersed between the effective clock cycles for implementing a programmable slowdown factor S, such that a modified number of C*S overall clock cycles will effect processing of the predetermined amount of digital signal information.

    摘要翻译: 处理器在时钟设施的控制下执行图像处理,使得C个有效时钟周期的序列将影响预定量的图像信息的处理操作。 特别地,处理器具有编程装置,用于实现散布在用于实现可编程减速因子S的有效时钟周期之间的可编程失速时钟周期,使得修改数量的C * S总体时钟周期将影响预定量的数字信号的处理 信息。