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公开(公告)号:US12146902B2
公开(公告)日:2024-11-19
申请号:US18306616
申请日:2023-04-25
Applicant: QUALCOMM Incorporated
Inventor: Abdellatif Bellaouar , Arul Balasubramaniyan , Gurkanwal Singh Sahota , Muhammad Hassan , Jorge Garcia , Bhushan Shanti Asuri , Ravi Sridhara , Omar Essam El-Aassar , Chinmaya Mishra
IPC: G01R21/10 , G01R21/133 , H03F3/45 , H03M1/12
Abstract: In certain aspects, a method is provided for measuring power using a resistive element coupled between a power amplifier and an antenna. The method includes squaring a voltage from a first terminal of the resistive element to obtain a first signal, squaring a voltage from a second terminal of the resistive element to obtain a second signal, and generating a measurement signal based on a difference between the first signal and the second signal. In some implementations, the resistive element is implemented with a power switch.
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公开(公告)号:US12132455B2
公开(公告)日:2024-10-29
申请号:US17647534
申请日:2022-01-10
Applicant: QUALCOMM Incorporated
Inventor: Te Yu Kao , Muhammad Hassan , Abdellatif Bellaouar
CPC classification number: H03F3/245 , H03F2200/451 , H03F2200/537
Abstract: In certain aspects, an apparatus includes a first amplifier having a first output and a second output, and a transformer. The transformer includes a first switchable inductor coupled between the first output and the second output, a first capacitor coupled in parallel with the first switchable inductor, a second switchable inductor magnetically coupled to the first switchable inductor, a second capacitor coupled in parallel with the second switchable inductor, a third switchable inductor magnetically coupled to the first switchable inductor, and a third capacitor coupled in parallel with the third switchable inductor.
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公开(公告)号:US12301170B2
公开(公告)日:2025-05-13
申请号:US17481559
申请日:2021-09-22
Applicant: QUALCOMM INCORPORATED
Inventor: Chuan Wang , Li Liu , Bhushan Shanti Asuri , Gurkanwal Singh Sahota , Abdellatif Bellaouar , Vinod Panikkath
Abstract: A transceiver interface for a phased array element includes a first magnetic circuit having a primary coil and a secondary coil, a second magnetic circuit having a primary coil, a secondary coil and a tertiary coil, a main amplifier path and an auxiliary amplifier path, the main amplifier path coupled to the primary coil of the second magnetic circuit and configured to receive a quadrature signal, the main amplifier path configured to provide a quadrature output signal, the auxiliary amplifier path coupled to the primary coil of the first magnetic circuit and configured to receive an in-phase signal, the auxiliary amplifier path configured to provide an in-phase output signal, a selectable output circuit configured to selectively combine the in-phase output signal and the quadrature output signal, and a low noise amplifier (LNA) coupled to the tertiary coil of the second magnetic circuit.
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公开(公告)号:US20240097619A1
公开(公告)日:2024-03-21
申请号:US17932403
申请日:2022-09-15
Applicant: QUALCOMM Incorporated
Inventor: Ranadeep Dutta , Abdellatif Bellaouar , Chuan-Cheng Cheng
CPC classification number: H03F1/26 , H03F3/45475 , H03F2200/372
Abstract: An apparatus is disclosed for reducing parasitic capacitance. In an example aspect, an apparatus includes an amplifier having a differential cascode configuration. Each stack of the amplifier includes a first transistor configured to operate as an input stage and a second transistor configured to operate as a cascode stage. The first and second transistors each include two channel terminal regions having a doping type that is uniform across the two channel terminal regions. Surfaces of first channel terminal regions of the first and second transistors abut a first and second quantity of electrical contacts, respectively. Second channel terminal regions of the first and second transistors form a floating region at a floating node. Each of the first quantity of electrical contacts and the second quantity of electrical contacts is greater than a third quantity of electrical contacts abutting a surface of the floating region.
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公开(公告)号:US11380988B2
公开(公告)日:2022-07-05
申请号:US17098319
申请日:2020-11-13
Applicant: QUALCOMM Incorporated
Inventor: Muhammad Hassan , Jeremy Goldblatt , Bhushan Shanti Asuri , Jeremy Darren Dunworth , Abdellatif Bellaouar , Ravi Sridhara , Jorge Garcia
Abstract: In some aspects, an apparatus includes a transformer including a first inductor, a second inductor, and a third inductor. The apparatus also includes a power amplifier coupled to the first inductor, a first antenna coupled to a first terminal of the second inductor, a second antenna coupled to a second terminal of the second inductor, a first switch coupled between the first terminal of the second inductor and a ground, a second switch coupled between the second terminal of the second inductor and the ground, and a low-noise amplifier coupled to the third inductor.
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公开(公告)号:US11656254B2
公开(公告)日:2023-05-23
申请号:US16932589
申请日:2020-07-17
Applicant: QUALCOMM Incorporated
Inventor: Abdellatif Bellaouar , Arul Balasubramaniyan , Gurkanwal Singh Sahota , Muhammad Hassan , Jorge Garcia , Bhushan Shanti Asuri , Ravi Sridhara , Omar Essam El-Aassar , Chinmaya Mishra
IPC: G01R21/10 , G01R21/133 , H03F3/45 , H03M1/12
CPC classification number: G01R21/10 , G01R21/133 , H03F3/45475 , H03F2200/171 , H03F2200/294 , H03F2200/451 , H03M1/12
Abstract: In certain aspects, a method is provided for measuring power using a resistive element coupled between a power amplifier and an antenna. The method includes squaring a voltage from a first terminal of the resistive element to obtain a first signal, squaring a voltage from a second terminal of the resistive element to obtain a second signal, and generating a measurement signal based on a difference between the first signal and the second signal. In some implementations, the resistive element is implemented with a power switch.
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