公开(公告)号：US20140348274A1

公开(公告)日：2014-11-27

申请号：US13901924

申请日：2013-05-24

Applicant: QUALCOMM INCORPORATED

Inventor： Ahmed A Youssef ,  Li-Chung Chang

IPC: H03G3/20

CPC classification number: H03G3/20 ,  H03F1/223 ,  H03F3/193 ,  H03F3/68 ,  H03F2200/492 ,  H03G1/0023 ,  H04B1/18

Abstract: Techniques for providing a receiver front end supporting carrier aggregation with gain alignment and improved matching across modes. In an aspect, auxiliary circuitry is configurable to selectively enable or disable mutual coupling between a source degeneration inductor of an LNA input transistor and an auxiliary inductor. A negative turns ratio coupling is provided between the inductors, such that the effective inductance of the source degeneration inductor is lowered when mutually coupled to the auxiliary inductor. In a non-carrier aggregation (non-CA) mode, the auxiliary inductor is disabled, while in a carrier aggregation (CA) mode, the auxiliary inductor is enabled. In this manner, using a single transistor, gain alignment across non-CA and CA modes is achieved. Furthermore, matching is preserved across non-CA and CA modes using a single external matching component.

Abstract translation: 用于提供接收机前端的技术，其支持具有增益对准和改进的模式匹配的载波聚合。 在一方面，辅助电路可配置为选择性地启用或禁用LNA输入晶体管的源极退化电感器和辅助电感器之间的互耦合。 在电感器之间提供负匝数比耦合，使得当与辅助电感器相互耦合时，源极退化电感器的有效电感降低。 在非载波聚合（非CA）模式下，辅助电感被禁用，而在载波聚合（CA）模式下，辅助电感被使能。 以这种方式，使用单个晶体管，实现了非CA和CA模式之间的增益对准。 此外，使用单个外部匹配组件在非CA和CA模式之间保留匹配。

公开(公告)号：US09106185B2

公开(公告)日：2015-08-11

申请号：US13794110

申请日：2013-03-11

Applicant: QUALCOMM Incorporated

Inventor： Ahmed A Youssef ,  Sherif Abdelhalem ,  Ehab A Abdel Ghany ,  Li-Chung Chang

IPC: H03G3/12 ,  H03F1/22 ,  H03F1/08 ,  H03F1/56 ,  H03F3/189 ,  H03F3/45 ,  H03G1/00

CPC classification number: H03F1/223 ,  H03F1/08 ,  H03F1/56 ,  H03F3/189 ,  H03F3/45179 ,  H03F2200/492 ,  H03G1/0023

Abstract: Amplifiers with inductive degeneration and configurable gain and input matching are disclosed. In an exemplary design, an apparatus includes a gain transistor, an inductor, and an input matching circuit for an amplifier. The gain transistor has a variable gain determined based on its bias current. The inductor is coupled between the gain transistor and circuit ground. The input matching circuit is selectively coupled to the gain transistor based on the variable gain of the gain transistor. For example, the input matching circuit may be coupled to the gain transistor in a low-gain mode and decoupled from the gain transistor in the high-gain mode. In an exemplary design, the input matching circuit includes a resistor, a capacitor, and a second transistor coupled in series. The resistor is used for input matching of the amplifier. The second transistor couples or decouples the resistor to or from the gain transistor.

Abstract translation: 公开了具有感应退化和可配置增益和输入匹配的放大器。 在示例性设计中，装置包括用于放大器的增益晶体管，电感器和输入匹配电路。 增益晶体管具有基于其偏置电流确定的可变增益。 电感器耦合在增益晶体管和电路接地之间。 基于增益晶体管的可变增益，输入匹配电路选择性地耦合到增益晶体管。 例如，输入匹配电路可以以低增益模式耦合到增益晶体管，并在高增益模式中与增益晶体管去耦。 在示例性设计中，输入匹配电路包括串联耦合的电阻器，电容器和第二晶体管。 该电阻用于放大器的输入匹配。 第二个晶体管将电阻器耦合或去耦合增益晶体管。

公开(公告)号：US09350310B2

公开(公告)日：2016-05-24

申请号：US13901924

申请日：2013-05-24

Applicant: QUALCOMM Incorporated

Inventor： Ahmed A Youssef ,  Li-Chung Chang

IPC: H04B1/16 ,  H03G3/20 ,  H03F1/22 ,  H03F3/193 ,  H03F3/68 ,  H04B1/18 ,  H03G1/00

CPC classification number: H03G3/20 ,  H03F1/223 ,  H03F3/193 ,  H03F3/68 ,  H03F2200/492 ,  H03G1/0023 ,  H04B1/18

Abstract: Techniques for providing a receiver front end supporting carrier aggregation with gain alignment and improved matching across modes. In an aspect, auxiliary circuitry is configurable to selectively enable or disable mutual coupling between a source degeneration inductor of an LNA input transistor and an auxiliary inductor. A negative turns ratio coupling is provided between the inductors, such that the effective inductance of the source degeneration inductor is lowered when mutually coupled to the auxiliary inductor. In a non-carrier aggregation (non-CA) mode, the auxiliary inductor is disabled, while in a carrier aggregation (CA) mode, the auxiliary inductor is enabled. In this manner, using a single transistor, gain alignment across non-CA and CA modes is achieved. Furthermore, matching is preserved across non-CA and CA modes using a single external matching component.

Abstract translation: 用于提供接收机前端的技术，其支持具有增益对准和改进的模式匹配的载波聚合。 在一方面，辅助电路可配置为选择性地启用或禁用LNA输入晶体管的源极退化电感器和辅助电感器之间的互耦合。 在电感器之间提供负匝数比耦合，使得当与辅助电感器相互耦合时，源极退化电感器的有效电感降低。 在非载波聚合（非CA）模式下，辅助电感被禁用，而在载波聚合（CA）模式下，辅助电感被使能。 以这种方式，使用单个晶体管，实现了非CA和CA模式之间的增益对准。 此外，使用单个外部匹配组件在非CA和CA模式之间保留匹配。

公开(公告)号：US09166731B2

公开(公告)日：2015-10-20

申请号：US13901335

申请日：2013-05-23

Applicant: QUALCOMM Incorporated

Inventor： Li-Chung Chang ,  Ehab A Abdel Ghany ,  Ahmed A Youssef

IPC: H03H7/42 ,  H04K3/00 ,  H03H7/01 ,  H04B1/10 ,  H03H7/07 ,  H03H7/00

CPC classification number: H04K3/228 ,  H03H7/0115 ,  H03H7/0184 ,  H03H7/07 ,  H03H7/1775 ,  H03H2007/013 ,  H03H2210/01 ,  H04B1/1036

Abstract: Techniques for providing low-cost and effective jammer rejection for a radio receiver. In an aspect, a notch filter is provided between a transformer and a differential mixer in the receiver. The notch frequency of the notch filter may be selected to correspond to an expected jammer frequency to effectively attenuate the jammer signal prior to down-conversion mixing by the mixer. The notch filter may be implemented using various techniques, e.g., an L-C combination having adjustable capacitance, and/or elliptic or Chebyshev filters.

Abstract translation: 为无线电接收机提供低成本和有效干扰抑制的技术。 在一方面，陷波滤波器设置在接收机中的变压器和差分混频器之间。 可以选择陷波滤波器的陷波频率以对应于预期的干扰频率，以在混频器进行下变频混频之前有效地衰减干扰信号。 陷波滤波器可以使用各种技术来实现，例如具有可调电容的L-C组合和/或椭圆形或切比雪夫滤波器。

公开(公告)号：US09035697B2

公开(公告)日：2015-05-19

申请号：US13840317

申请日：2013-03-15

Applicant: QUALCOMM Incorporated

Inventor： Ahmed A Youssef ,  Li-Chung Chang

IPC: H03F1/14 ,  H03F1/22 ,  H03F3/68 ,  H03F3/193 ,  H03F3/24 ,  H03F1/32 ,  H03F1/56 ,  H03F3/21 ,  H03F3/72

CPC classification number: H03F3/68 ,  H03F1/223 ,  H03F1/3205 ,  H03F1/56 ,  H03F3/193 ,  H03F3/211 ,  H03F3/245 ,  H03F3/72 ,  H03F2200/489 ,  H03F2200/492 ,  H03F2200/541 ,  H03G1/0023

Abstract: Split amplifiers with configurable gain and linearization circuitry are disclosed. In an exemplary design, an apparatus includes first and second amplifier circuits and a linearization circuit, which may be part of an amplifier. The first and second amplifier circuits are coupled in parallel and to an amplifier input. The linearization circuit is also coupled to the amplifier input. The first and second amplifier circuits are enabled in a high-gain mode. One of the first and second amplifier circuits is enabled in a low-gain mode. The linearization circuit is enabled in the second mode and disabled in the first mode. The amplifier is split into multiple sections. Each section includes an amplifier circuit and is a fraction of the amplifier. High linearly may be obtained using one amplifier circuit and the linearization circuit in the low-gain mode.

Abstract translation: 公开了具有可配置增益和线性化电路的分路放大器。 在示例性设计中，装置包括第一和第二放大器电路和线性化电路，其可以是放大器的一部分。 第一和第二放大器电路并联耦合到放大器输入端。 线性化电路也耦合到放大器输入端。 第一和第二放大器电路在高增益模式下使能。 第一和第二放大器电路之一在低增益模式下使能。 线性化电路在第二模式下被使能并且在第一模式中被禁用。 放大器分为多个部分。 每个部分包括放大器电路，并且是放大器的一小部分。 可以使用一个放大器电路和低增益模式下的线性化电路获得高线性。