公开(公告)号：US20190245497A1

公开(公告)日：2019-08-08

申请号：US15887816

申请日：2018-02-02

申请人： pSemi Corporation

发明人： Miles Sanner ,  Emre Ayranci

IPC分类号： H03F3/195 ,  H03F1/02

CPC分类号： H03F3/195 ,  H03F1/0211 ,  H03F1/223 ,  H03F1/56 ,  H03F3/193 ,  H03F3/211 ,  H03F3/72 ,  H03F2200/111 ,  H03F2200/222 ,  H03F2200/231 ,  H03F2200/249 ,  H03F2200/267 ,  H03F2200/294 ,  H03F2200/387 ,  H03F2200/391 ,  H03F2200/396 ,  H03F2200/421 ,  H03F2200/451 ,  H03F2200/489 ,  H03F2200/492 ,  H03F2203/7209 ,  H04B1/16

摘要： A receiver front end having low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. A drain switch is provided between the drain terminals of input FETs to place the input FETs in parallel. This increases the gm of the input stage of the amplifier, thus improving the noise figure of the amplifier.

公开(公告)号：US20180248530A1

公开(公告)日：2018-08-30

申请号：US15691788

申请日：2017-08-31

申请人： Kabushiki Kaisha Toshiba

发明人： Maomi Katsumata

IPC分类号： H03G3/30 ,  H03F1/02 ,  H03F3/193 ,  H03F3/21

CPC分类号： H03G3/3042 ,  H01L23/66 ,  H01L27/1203 ,  H01L2223/665 ,  H03F1/0211 ,  H03F1/0261 ,  H03F1/223 ,  H03F1/301 ,  H03F3/193 ,  H03F3/21 ,  H03F3/245 ,  H03F3/45183 ,  H03F2200/18 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2200/489 ,  H03G1/0029 ,  H03G1/007 ,  H03G3/3052

摘要： A circuit is formed on an SOI. The bias generator is connected to the gates of first and second transistors. In the bias generator, a first variable current source is connected to the power supply circuit via a power supply node. A third transistor is connected between the first variable current source and a ground-voltage source. A gate thereof is connected to the gate of the first transistor. A first operational amplifier controls a gate voltage of the third transistor so that a voltage at a second node between the first variable current source and the third transistor becomes almost equal to a reference-voltage. A first characteristics changer is connected to the gate of the third transistor or a second node, to change at least one loop gain characteristics and phase characteristics of a loop from the first operational amplifier, through the third transistor, to the first variable current source.

公开(公告)号：US20180198422A1

公开(公告)日：2018-07-12

申请号：US15916411

申请日：2018-03-09

申请人： Telefonaktiebolaget LM Ericsson (publ)

发明人： Pete Sivonen ,  Jarkko Jussila ,  Sami Vilhonen

IPC分类号： H03F1/56 ,  H04B1/10 ,  H03F3/26 ,  H03F3/193 ,  H03F1/26 ,  H03F1/22

CPC分类号： H03F1/56 ,  H03F1/223 ,  H03F1/26 ,  H03F3/193 ,  H03F3/265 ,  H03F2200/222 ,  H03F2200/294 ,  H03F2200/387 ,  H03F2200/451 ,  H03F2200/489 ,  H03F2200/54 ,  H03F2200/87 ,  H04B1/1036

摘要： An amplifier for converting a single-ended input signal to a differential output signal. The amplifier comprises a first transistor, a second transistor, a third transistor and a fourth transistor. The first transistor, configured in common-source or common-emitter mode, receives the single-ended input signal and generates a first part of the differential output signal. The second transistor, also configured in common-source or common-emitter mode, generates a second part of the differential output signal. The third and fourth transistors are capacitively cross-coupled. The amplifier further comprises inductive degeneration such that a source or emitter of the first transistor is connected to a first inductor and a source or emitter of the second transistor is connected to a second inductor.

公开(公告)号：US20180175803A1

公开(公告)日：2018-06-21

申请号：US15896844

申请日：2018-02-14

申请人： QUALCOMM Incorporated

发明人： Prasad Gudem ,  Himanshu Khatri ,  Devavrata Godbole ,  Eugene Worley

IPC分类号： H03F1/22 ,  H02H9/04 ,  H01L27/02 ,  H03F1/52 ,  H03F3/193

CPC分类号： H03F1/223 ,  H01L27/0255 ,  H02H9/046 ,  H03F1/523 ,  H03F3/193 ,  H03F2200/489

摘要： An apparatus is described. The apparatus includes an input device. The apparatus also includes a positive supply voltage pad. The apparatus further includes an input signal pad. The apparatus also includes a ground pad. The apparatus further includes charged-device model protection circuitry that protects the input device from electrostatic discharge. The charged-device model protection circuitry includes at least one of de-Q circuitry and a cascode device.

公开(公告)号：US20180083579A1

公开(公告)日：2018-03-22

申请号：US15272103

申请日：2016-09-21

申请人： Peregrine Semiconductor Corporation

发明人： Hossein Noori ,  Chih-Chieh Cheng

IPC分类号： H03F1/32 ,  H03F1/56 ,  H03F3/195 ,  H03G3/00 ,  H03G3/10

CPC分类号： H03F1/3205 ,  H03F1/56 ,  H03F3/195 ,  H03F3/72 ,  H03F2200/18 ,  H03F2200/21 ,  H03F2200/211 ,  H03F2200/213 ,  H03F2200/222 ,  H03F2200/225 ,  H03F2200/24 ,  H03F2200/243 ,  H03F2200/249 ,  H03F2200/27 ,  H03F2200/294 ,  H03F2200/297 ,  H03F2200/301 ,  H03F2200/306 ,  H03F2200/312 ,  H03F2200/387 ,  H03F2200/391 ,  H03F2200/399 ,  H03F2200/417 ,  H03F2200/451 ,  H03F2200/48 ,  H03F2200/489 ,  H03F2200/492 ,  H03F2200/495 ,  H03F2200/546 ,  H03F2200/72 ,  H03F2200/75 ,  H03G1/0029 ,  H03G1/0088 ,  H03G1/0094 ,  H03G3/001 ,  H03G3/008 ,  H03G3/10 ,  H03G2201/106 ,  H03G2201/307 ,  H03G2201/504

摘要： A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” input stage and a “common gate” output stage can be turned on or off using the gate of the output stage. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input stage of each cascode. Further switches used for switching degeneration inductors, gate/sources caps and gate to ground caps for each legs can be used to further improve the matching performance of the invention.

公开(公告)号：US20170230014A1

公开(公告)日：2017-08-10

申请号：US15229464

申请日：2016-08-05

申请人： STMicroelectronics SA

发明人： Raphael Paulin

IPC分类号： H03F1/56 ,  H04B5/00 ,  H03F3/195

CPC分类号： H03F1/565 ,  H03F1/086 ,  H03F1/223 ,  H03F3/195 ,  H03F2200/108 ,  H03F2200/181 ,  H03F2200/216 ,  H03F2200/294 ,  H03F2200/297 ,  H03F2200/301 ,  H03F2200/321 ,  H03F2200/336 ,  H03F2200/387 ,  H03F2200/391 ,  H03F2200/451 ,  H03F2200/48 ,  H03F2200/489 ,  H03F2200/492 ,  H03F2200/75 ,  H04B5/0081

摘要： A low-noise amplifier device includes an inductive input element, an amplifier circuit, an inductive output element and an inductive degeneration element. The amplifier device is formed in and on a semiconductor substrate. The semiconductor substrate supports metallization levels of a back end of line structure. The metal lines of the inductive input element, inductive output element and inductive degeneration element are formed within one or more of the metallization levels. The inductive input element has a spiral shape and the an amplifier circuit, an inductive output element and an inductive degeneration element are located within the spiral shape.

公开(公告)号：US09712195B2

公开(公告)日：2017-07-18

申请号：US14711623

申请日：2015-05-13

申请人： QUALCOMM Incorporated

发明人： Cheng-Han Wang ,  Conor Donovan ,  Jesse Aaron Richmond ,  Jin-Su Ko

IPC分类号： H04B1/40 ,  H04B1/10 ,  H03F3/19 ,  H03F3/21 ,  H04B1/3827 ,  H04B1/48 ,  H03F1/56 ,  H03F1/22 ,  H03F1/34 ,  H03F3/193 ,  H03F3/24

CPC分类号： H04B1/1027 ,  H03F1/223 ,  H03F1/347 ,  H03F1/565 ,  H03F3/19 ,  H03F3/193 ,  H03F3/211 ,  H03F3/24 ,  H03F3/245 ,  H03F2200/111 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2200/489 ,  H04B1/0458 ,  H04B1/3827 ,  H04B1/48 ,  H04B2001/0408 ,  H04B2001/1072 ,  H04B2001/485

摘要： An amplifier includes a gain transistor including a control terminal to receive an input signal. A degeneration inductor is coupled between the first terminal of the gain transistor and ground. A shunt inductor and a capacitor are coupled in series between the control terminal of the gain transistor and ground, and form a filter to attenuate frequencies of the input signal within a frequency range. The degeneration inductor and the shunt inductor form a transformer to provide impedance matching.

公开(公告)号：US09608568B2

公开(公告)日：2017-03-28

申请号：US14638874

申请日：2015-03-04

申请人： Futurewei Technologies, Inc.

发明人： Yoonhyuk Ro ,  Xuya Qiu ,  Jamil Forrester

IPC分类号： H03F1/02 ,  H03F3/16 ,  H03F3/45

CPC分类号： H03F1/0205 ,  H03F1/3211 ,  H03F1/347 ,  H03F3/16 ,  H03F3/45188 ,  H03F2200/117 ,  H03F2200/489 ,  H03F2203/45386 ,  H03F2203/45662 ,  H03F2203/45731

摘要： Disclosed are apparatuses and methods to overcome technology limitations to achieve linearity and efficiency performance suitable for practical wireless communications systems. In an embodiment, an amplifier is provided that superimposes the transconductance from a common source amplifier with inductor degeneration with the transconductance from a common source amplifier without degeneration. In an embodiment, an amplifier is provided having a feedback-balun-transformer that provides electro-magnetic coupling between primary, secondary, and negative feedback degeneration inductors and a differential to single-ended conversion output.

公开(公告)号：US08912845B2

公开(公告)日：2014-12-16

申请号：US13736028

申请日：2013-01-07

申请人： Edward Perry Jordan

发明人： Edward Perry Jordan

IPC分类号： H03F1/34 ,  H03F1/00

CPC分类号： H03F1/00 ,  H03F1/347 ,  H03F3/195 ,  H03F3/211 ,  H03F2200/411 ,  H03F2200/489 ,  H03F2200/537

摘要： An integrated circuit includes a radio frequency (RF) amplifier having a trifilar transformer coupled to a gain device in two negative feedback paths. The trifilar transformer includes a first winding, a second winding and a third winding, a first dielectric core is disposed between the first winding and the second winding, and a second dielectric core is disposed between the second winding and the third winding. A first winding ratio between the first winding and the second winding combined with a second winding ratio between the second winding and the third winding affects a total gain of the RF amplifier. In a specific embodiment, the gain device is a transistor, the first winding is coupled to a base of the transistor, the second winding is coupled to a collector of the transistor, and the third winding is coupled to an emitter of the transistor.

摘要翻译： 集成电路包括具有耦合到两个负反馈路径中的增益器件的三相变压器的射频（RF）放大器。 三相变压器包括第一绕组，第二绕组和第三绕组，第一介质芯设置在第一绕组和第二绕组之间，第二介质芯设置在第二绕组和第三绕组之间。 第一绕组和第二绕组之间的第一绕组比与第二绕组和第三绕组之间的第二绕组比组合影响RF放大器的总增益。 在具体实施例中，增益器件是晶体管，第一绕组耦合到晶体管的基极，第二绕组耦合到晶体管的集电极，第三绕组耦合到晶体管的发射极。

公开(公告)号：US20100315151A1

公开(公告)日：2010-12-16

申请号：US12861465

申请日：2010-08-23

申请人： Alison Burdett

发明人： Alison Burdett

IPC分类号： H03K17/00

CPC分类号： G06F1/3203 ,  G06F1/3287 ,  G11C5/144 ,  G11C5/147 ,  H03F3/189 ,  H03F3/45188 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2200/489 ,  H03F2200/492 ,  H03K23/544 ,  Y02D10/171 ,  Y02D50/20

摘要： Apparatus for controlling an integrated circuit comprises a power control device for controlling the power to at least part of the integrated circuit, the power control device is connected to a first input, for receiving a power-down signal, and a second input, for receiving a power-up signal, the power control device is adapted to power-up the at least part of the integrated circuit if a power-up signal is received at the second input when the at least part of the integrated circuit is in a powered-down state, and the power control device is further adapted to maintain the at least part of the integrated circuit in the powered-up state regardless of any signal received at the second input when the at least part of the integrated circuit is in a powered-up state, the apparatus is arranged so that the second input is also connected to a component of the integrated circuit and the apparatus comprising means for sending a signal to the component of the integrated circuit via the second input when the at least part of the integrated circuit is in the powered-up state.

摘要翻译： 用于控制集成电路的装置包括用于控制至少部分集成电路的电力的功率控制装置，功率控制装置连接到用于接收掉电信号的第一输入端和用于接收功率的第二输入端 功率控制装置适于在集成电路的至少一部分处于供电状态时在第二输入处接收到上电信号时对集成电路的至少一部分供电， 并且所述功率控制装置还适于将所述集成电路的至少一部分保持在上电状态，而不管在所述集成电路的至少一部分处于供电状态时是否在所述第二输入处接收的任何信号。 该装置被布置成使得第二输入也连接到集成电路的部件，并且该装置包括用于经由第二输入信号将信号发送到集成电路的部件的装置 当集成电路的至少一部分处于上电状态时放置。