公开(公告)号：US10014693B2

公开(公告)日：2018-07-03

申请号：US15162369

申请日：2016-05-23

Applicant: QUALCOMM Incorporated

Inventor： Dileep Marchya ,  Dhaval Kanubhai Patel ,  Ujwal Patel ,  Nagamalleswararao Ganji ,  Mastan Manoj Kumar Amara Venkata ,  Panneer Arumugam

IPC: H02J3/14 ,  H02J4/00

CPC classification number: H02J4/00 ,  G06F1/26 ,  G06F1/3206 ,  G06F1/324 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172

Abstract: The disclosure relates to a system including a set of subsystems sharing a voltage rail. The system includes a power controller configured to send messages, such as interrupts, to the subsystems concerning a change of state of a supply voltage on the voltage rail. Such messages may have been sent in response to requests and messages from the subsystems, respectively. In response to the messages, the subsystems may send requests to the power controller for different dynamic clock voltage scaling (DCVS) levels, respectively. In response to such requests, the power controller may set the supply voltage and frequencies of clock signals for the requesting subsystems, respectively.

公开(公告)号：US10509588B2

公开(公告)日：2019-12-17

申请号：US14995125

申请日：2016-01-13

Applicant: QUALCOMM INCORPORATED

Inventor： Serag Gadelrab ,  Sudeep Ravi Kottilingal ,  Meghal Varia ,  Pooja Sinha ,  Ujwal Patel ,  Ruo Long Liu ,  Jeffrey Chu ,  Sina Gholamian ,  Hyukjune Chung ,  David Strasser ,  Raghavendra Nagaraj ,  Eric Demers

IPC: G06F3/06 ,  G06F13/16 ,  G06F1/324 ,  G06F1/3296 ,  G06F1/3234

Abstract: Systems, methods, and computer programs are disclosed for controlling memory frequency. One method comprises a first memory client generating a compressed data buffer and compression statistics related to the compressed data buffer. The compressed data buffer and the compression statistics are stored in a memory device. Based on the stored compression statistics, a frequency or voltage setting of the memory device is adjusted for enabling a second memory client to read the compressed data buffer.

公开(公告)号：US20170338661A1

公开(公告)日：2017-11-23

申请号：US15162369

申请日：2016-05-23

Applicant: QUALCOMM Incorporated

Inventor： Dileep Marchya ,  Dhaval Kanubhai Patel ,  Ujwal Patel ,  Nagamalleswararao Ganji ,  Mastan Manoj Kumar Amara Venkata ,  Panneer Arumugam

IPC: H02J4/00

CPC classification number: H02J4/00 ,  G06F1/26 ,  G06F1/3206 ,  G06F1/324 ,  G06F1/3296

Abstract: The disclosure relates to a system including a set of subsystems sharing a voltage rail. The system includes a power controller configured to send messages, such as interrupts, to the subsystems concerning a change of state of a supply voltage on the voltage rail. Such messages may have been sent in response to requests and messages from the subsystems, respectively. In response to the messages, the subsystems may send requests to the power controller for different dynamic clock voltage scaling (DCVS) levels, respectively. In response to such requests, the power controller may set the supply voltage and frequencies of clock signals for the requesting subsystems, respectively.