公开(公告)号：US11735804B2

公开(公告)日：2023-08-22

申请号：US16871822

申请日：2020-05-11

Applicant: QUALCOMM Incorporated

Inventor： Chaoqi Zhang ,  Suhyung Hwang ,  Jaehyun Yeon ,  Taesik Yang ,  Jeongil Jay Kim ,  Darryl Sheldon Jessie ,  Mohammad Ali Tassoudji

IPC: H01Q1/38 ,  H01Q1/12 ,  H05K1/02 ,  H05K3/00 ,  H05K3/46

CPC classification number: H01Q1/12 ,  H05K1/0243 ,  H05K3/0047 ,  H05K3/4644 ,  H05K2201/10098

Abstract: A multi-core broadband printed circuit board (PCB) antenna and methods for fabricating such an antenna are provided. One example antenna implemented with a multi-core PCB generally includes a first core structure, a second core structure disposed above the first core structure, and one or more metal layers disposed above the second core structure or below the first core structure. The first core structure includes a first core layer, a first metal layer disposed below the first core layer, and a second metal layer disposed above the first core layer. The second core structure includes a second core layer, a third metal layer disposed below the second core layer, and a fourth metal layer disposed above the second core layer. The first core layer and the second core layer may have different thicknesses.

公开(公告)号：US11139224B2

公开(公告)日：2021-10-05

申请号：US16704789

申请日：2019-12-05

Applicant: QUALCOMM Incorporated

Inventor： Chaoqi Zhang ,  Rajneesh Kumar ,  Li-Sheng Weng ,  Darryl Sheldon Jessie ,  Suhyung Hwang ,  Jeahyeong Han ,  Xiaoming Chen ,  Jaehyun Yeon

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/56 ,  H01L21/67 ,  H01L23/31

Abstract: A package that includes a substrate having a routing region and a non-routing region along a periphery of the substrate. The non-routing region includes a plurality of vias configured as a shield. The package includes an integrated device coupled to the substrate, and an encapsulation layer located over the substrate such that the encapsulation layer encapsulates the integrated device.

公开(公告)号：US20220199547A1

公开(公告)日：2022-06-23

申请号：US17127750

申请日：2020-12-18

Applicant: QUALCOMM Incorporated

Inventor： Li-Sheng Weng ,  Yu-Chih Chen ,  Chaoqi Zhang

IPC: H01L23/552 ,  H01L23/00

Abstract: Fan-out wafer-level packaging (FOWLP) integrated circuits (ICs) employing electro-magnetic (EM) interference (EMI) shield structure in fan out area for EMI shielding, and related fabricating methods are disclosed. The IC includes a semiconductor die (“IC die”) that is bonded to the reconstituted carrier wafer such that a fan-out area is provided between adjacent IC dies to provide area for fan-out interconnects to provide additional die interconnections to the IC die. In exemplary aspects, the IC includes an EMI shield that includes vias formed in an un-used area in fan-out area adjacent to the IC die electrically that are otherwise unused for input/output (I/O) signal interconnects for coupling I/O signals to the IC die. The EMI shield is electrically coupled to a ground node of the IC die to provide an effective EMI shield to block or attenuate unwanted EM noise propagated from the IC die outside the IC.