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公开(公告)号:US20170279359A1
公开(公告)日:2017-09-28
申请号:US15368458
申请日:2016-12-02
Applicant: QUALCOMM Incorporated
Inventor: Ricardo GONCALVES , Joshua ZAZZERA , Edgar MARTI-ARBONA , Juha OIKARINEN , Joseph RUTKOWSKI
CPC classification number: H02J3/00 , G05F1/10 , G06F1/3206 , H02J7/007 , H02M1/088 , H02M3/1582 , H02M3/1584 , H02M2001/0003 , H02M2003/1586
Abstract: An apparatus improves efficiency of a non-inverting buck-or-boost regulator by reducing an amount of switching of the buck-or-boost regulator. A high side buck transistor and a high side boost transistor of the buck-or-boost regulator are turned on. A low side buck transistor and a low side boost transistor are turned off. The turning on and turning off short an input voltage node to an output voltage node of the buck-or-boost regulator to prevent switching of the high side buck transistor and the high side boost transistor. The turning on and turning off are based on a voltage difference between the input voltage node and the output voltage node.
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公开(公告)号:US20190334345A1
公开(公告)日:2019-10-31
申请号:US15962524
申请日:2018-04-25
Applicant: QUALCOMM Incorporated
Inventor: Yikai WANG , Joseph RUTKOWSKI
IPC: H02H9/04 , H03K17/22 , H03K5/06 , G01R19/165 , H03F1/30
Abstract: Certain aspects of the present disclosure provide a voltage transient detection circuit. The circuit generally includes a first switch having a first terminal coupled to an input signal source node, and a second switch having a first terminal coupled to the input signal source node. The apparatus includes a first shunt capacitive element coupled to a second terminal of the first switch, a second shunt capacitive element coupled to a second terminal of the second switch, a differential circuit having a first input coupled to the second terminal of the first switch, a second input coupled to the second terminal of the second switch, and an output coupled to an output node of the voltage transient detection circuit. For certain aspects, the apparatus also includes a first current source (selectively) coupled to the first shunt capacitive element and a second current source (selectively) coupled to the second shunt capacitive element.
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公开(公告)号:US20170279271A1
公开(公告)日:2017-09-28
申请号:US15269893
申请日:2016-09-19
Applicant: QUALCOMM Incorporated
Inventor: Ricardo GONCALVES , Joshua ZAZZERA , Edgar MARTI-ARBONA , Juha OIKARINEN , Joseph RUTKOWSKI
CPC classification number: H02J3/00 , G05F1/10 , G06F1/3206 , H02J7/007 , H02M1/088 , H02M3/1582 , H02M3/1584 , H02M2001/0003 , H02M2003/1586
Abstract: An apparatus and method for to incrementally reduce (e.g., de-rate) a power supply voltage output (VOUT) of a regulator to multiple subsystems in response to detecting high power conditions in a client device is described. In one instance, multiple low power client devices and a high power consumption client device are coupled to a power grid of the power management system with a power management integrated circuit (PMIC) supplying power to the power grid. The PMIC includes a buck-or-boost switching regulator including a load current adjustment device to de-rate the high power consumption device when a sum of the current consumed by the high power consumption device and the low power client devices is above a predetermined threshold.
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公开(公告)号:US20180316345A1
公开(公告)日:2018-11-01
申请号:US15497337
申请日:2017-04-26
Applicant: QUALCOMM Incorporated
Inventor: Taewoo KWAK , Joseph RUTKOWSKI
IPC: H03K17/687 , H02M3/158
CPC classification number: H03K17/6872 , H02M1/08 , H02M3/158 , H03K17/04123 , H03K2217/0063
Abstract: Techniques for improving the transient response in a switching converter are provided. An example of a gate driving circuit for driving a high-side switch in a switching converter according to the disclosure includes a first switch operably coupled to a source lead and a gate lead of the high-side switch, a first super source follower circuit operably coupled to the gate lead of the high-side switch, and a mid-voltage power supply operably coupled to the first super source follower circuit.
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5.
公开(公告)号:US20180131336A1
公开(公告)日:2018-05-10
申请号:US15473538
申请日:2017-03-29
Applicant: QUALCOMM Incorporated
Inventor: Taewoo KWAK , Joseph RUTKOWSKI
CPC classification number: H03F3/45076 , H03F1/0233 , H03F1/14 , H03F1/342 , H03F3/45071 , H03F3/45183 , H03F3/45475 , H03F3/45636 , H03F2203/45116 , H03F2203/45138 , H03F2203/45264 , H03F2203/45526 , H03F2203/45604
Abstract: A loop compensation circuit includes a differential difference amplifier having a first transconductance stage with a first input terminal and a second input terminal. The first input terminal is coupled to a voltage reference and the second input terminal is coupled to a feedback node. The amplifier also includes a second transconductance stage having a third input terminal and a fourth input terminal. The third input terminal is coupled to a virtually specified fixed voltage and the fourth input terminal is coupled to a fixed specified voltage. The loop compensation circuit also includes a feedback impedance coupled between an output of the differential difference amplifier and the third input terminal and a second impedance between the third input terminal and the fixed specified voltage.
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