SYSTEMS AND METHODS FOR REDUCING TRANSMISSION INTERFERENCE
    2.
    发明申请
    SYSTEMS AND METHODS FOR REDUCING TRANSMISSION INTERFERENCE 有权
    减少传输干扰的系统和方法

    公开(公告)号:US20160164617A1

    公开(公告)日:2016-06-09

    申请号:US14562255

    申请日:2014-12-05

    CPC classification number: H04B15/02 H04B5/0031 H04B5/0075 H04W88/06

    Abstract: A method for inductively coupled communication is described. The method includes generating a first signal. The first signal frequency is a first integer multiple of a carrier frequency for inductively coupled communication. The method also includes selecting between a standalone mode and a coexistence mode. The method further includes dividing the first signal to obtain a second signal when in standalone mode. The second signal frequency is a second integer multiple of the carrier frequency. The method additionally includes dividing the first signal to obtain a third signal when in coexistence mode. The third signal frequency is a third integer multiple of the carrier frequency. The method also includes generating an inductively coupled communication signal using at least one of the second signal and the third signal.

    Abstract translation: 描述了一种用于电感耦合通信的方法。 该方法包括产生第一信号。 第一信号频率是用于电感耦合通信的载波频率的第一整数倍。 该方法还包括在独立模式和共存模式之间进行选择。 该方法还包括在独立模式下划分第一信号以获得第二信号。 第二信号频率是载波频率的第二整数倍。 该方法还包括在共存模式下划分第一信号以获得第三信号。 第三信号频率是载波频率的第三整数倍。 该方法还包括使用第二信号和第三信号中的至少一个产生电感耦合的通信信号。

    MODULATION THROUGH DIFFERENTIALLY DELAYED CLOCKS
    3.
    发明申请
    MODULATION THROUGH DIFFERENTIALLY DELAYED CLOCKS 有权
    通过差分延迟时钟进行调制

    公开(公告)号:US20150214939A1

    公开(公告)日:2015-07-30

    申请号:US14167972

    申请日:2014-01-29

    Abstract: A clock modulator can include two configurable delay units and can receive a baseband signal and a clock signal. The two configurable delay units can generate two delayed clock signals, each with different delay amounts. The delay amounts can be based on the baseband signal. The delayed clock signals can be combined to generate a modulated clock signal. A quadrature modulated clock signal can be generated when a first clock modulator receives a first baseband signal and a first clock signal and a second clock modulator receives a second baseband signal and a second clock signal. The first clock signal can be a ninety-degree phase shifted version of the second clock signal. The modulated clock signal from the first clock modulator can be combined with the modulated clock signal from the second clock modulator to generate the quadrature modulated clock signal.

    Abstract translation: 时钟调制器可以包括两个可配置的延迟单元,并且可以接收基带信号和时钟信号。 两个可配置的延迟单元可以产生两个延迟时钟信号,每个具有不同的延迟量。 延迟量可以基于基带信号。 延迟的时钟信号可以被组合以产生调制的时钟信号。 当第一时钟调制器接收第一基带信号和第一时钟信号并且第二时钟调制器接收到第二基带信号和第二时钟信号时,可以产生正交调制时钟信号。 第一个时钟信号可以是第二个时钟信号的九十度相移版本。 来自第一时钟调制器的调制时钟信号可以与来自第二时钟调制器的调制时钟信号组合以产生正交调制时钟信号。

    SWITCHED-MODE HIGH-LINEARITY TRANSMITTER USING PULSE WIDTH MODULATION
    4.
    发明申请
    SWITCHED-MODE HIGH-LINEARITY TRANSMITTER USING PULSE WIDTH MODULATION 有权
    使用脉冲宽度调制的开关式高精度发射器

    公开(公告)号:US20150071338A1

    公开(公告)日:2015-03-12

    申请号:US14025602

    申请日:2013-09-12

    CPC classification number: H04L27/36 H04L25/028 H04L25/4902 H04L27/362

    Abstract: A QAM transmitter is disclosed that may reduce the frequency of local clock signals and/or reduce the switching frequency of driver circuits when generating a QAM output signal for transmission. The QAM transmitter may generate a number of PWM signals indicative of in-phase (I) and quadrature (Q) signal components, and then use one or more selected even-order harmonics of the PWM signals to generate the QAM output signal. Odd-order harmonics of the PWM signals may be suppressed by selectively combining the PWM signals, and any remaining unwanted even-order harmonics may be suppressed using filters.

    Abstract translation: 公开了一种QAM发射器,其可以在产生用于传输的QAM输出信号时降低本地时钟信号的频率和/或降低驱动器电路的开关频率。 QAM发射机可以产生指示同相(I)和正交(Q)信号分量的多个PWM信号,然后使用PWM信号的一个或多个所选偶次谐波来产生QAM输出信号。 可以通过选择性地组合PWM信号来抑制PWM信号的奇次谐波,并且可以使用滤波器来抑制任何剩余的不需要的偶次谐波。

    SWITCHED MODE HIGH LINEARITY POWER AMPLIFIER
    8.
    发明申请
    SWITCHED MODE HIGH LINEARITY POWER AMPLIFIER 有权
    开关模式高线性功率放大器

    公开(公告)号:US20150077181A1

    公开(公告)日:2015-03-19

    申请号:US14029041

    申请日:2013-09-17

    CPC classification number: H03F3/2175 H03F3/217 H03F3/24

    Abstract: A switched mode, high linearity power amplifier can include a dynamic quantizer, a pulse width modulator and an output driver. In one embodiment, the dynamic quantizer can include a sigma-delta modulator configured to provide a multi-level digital signal. The pulse width modulator can receive the multi-level digital signal and provide a variable pulse width signal based, at least in part, on the multi-level digital signal. The output driver can include a class D output driver. The output driver can receive the variable pulse width signal to operate the class D output driver and provide an amplified signal. In one embodiment, the output driver can adjust the amplified signal to compensate for output errors.

    Abstract translation: 开关模式,高线性功率放大器可以包括动态量化器,脉宽调制器和输出驱动器。 在一个实施例中,动态量化器可以包括被配置为提供多电平数字信号的Σ-Δ调制器。 脉冲宽度调制器可以至少部分地基于多电平数字信号接收多电平数字信号并提供可变脉宽信号。 输出驱动器可以包括D类输出驱动器。 输出驱动器可以接收可变脉冲宽度信号来操作D类输出驱动器并提供放大信号。 在一个实施例中,输出驱动器可以调节放大的信号以补偿输出误差。

    SYSTEMS AND METHODS FOR TRANSMIT POWER CONTROL
    9.
    发明申请
    SYSTEMS AND METHODS FOR TRANSMIT POWER CONTROL 有权
    用于发射功率控制的系统和方法

    公开(公告)号:US20160302159A1

    公开(公告)日:2016-10-13

    申请号:US14684003

    申请日:2015-04-10

    CPC classification number: H04W52/246 H04B5/0012 H04B5/0075 H04W52/245

    Abstract: A method for inductively coupled communication is described. The method includes transmitting a carrier signal from a first device while receiving the carrier signal at a receiver of the first device. The method also includes determining a carrier level estimation using a loopback path on the receiver of the first device. The method further includes controlling a transmit power level of the first device based on a coupling strength with a second device as indicated by the carrier level estimation.

    Abstract translation: 描述了一种用于电感耦合通信的方法。 该方法包括在第一设备的接收机处接收载波信号的同时从第一设备发送载波信号。 该方法还包括使用第一设备的接收机上的环回路径确定载波电平估计。 该方法还包括基于与载波电平估计所指示的第二设备的耦合强度来控制第一设备的发射功率电平。

    Switched mode high linearity power amplifier
    10.
    发明授权
    Switched mode high linearity power amplifier 有权
    开关模式高线性功率放大器

    公开(公告)号:US09197172B2

    公开(公告)日:2015-11-24

    申请号:US14029041

    申请日:2013-09-17

    CPC classification number: H03F3/2175 H03F3/217 H03F3/24

    Abstract: A switched mode, high linearity power amplifier can include a dynamic quantizer, a pulse width modulator and an output driver. In one embodiment, the dynamic quantizer can include a sigma-delta modulator configured to provide a multi-level digital signal. The pulse width modulator can receive the multi-level digital signal and provide a variable pulse width signal based, at least in part, on the multi-level digital signal. The output driver can include a class D output driver. The output driver can receive the variable pulse width signal to operate the class D output driver and provide an amplified signal. In one embodiment, the output driver can adjust the amplified signal to compensate for output errors.

    Abstract translation: 开关模式,高线性功率放大器可以包括动态量化器,脉宽调制器和输出驱动器。 在一个实施例中,动态量化器可以包括被配置为提供多电平数字信号的Σ-Δ调制器。 脉冲宽度调制器可以至少部分地基于多电平数字信号接收多电平数字信号并提供可变脉宽信号。 输出驱动器可以包括D类输出驱动器。 输出驱动器可以接收可变脉冲宽度信号来操作D类输出驱动器并提供放大信号。 在一个实施例中,输出驱动器可以调节放大的信号以补偿输出误差。

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