公开(公告)号：US20240072032A1

公开(公告)日：2024-02-29

申请号：US17894043

申请日：2022-08-23

Applicant: QUALCOMM Incorporated

Inventor： Yanmei SONG ,  William STONE ,  Jianwen XU ,  Senthil SIVASWAMY ,  John HOLMES ,  Ryan LANE

IPC: H01L25/00 ,  H01L21/48 ,  H01L23/00 ,  H01L23/538 ,  H01L25/065 ,  H01L25/18

CPC classification number: H01L25/50 ,  H01L21/4853 ,  H01L21/4857 ,  H01L23/5389 ,  H01L24/05 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/73 ,  H01L24/81 ,  H01L24/82 ,  H01L24/92 ,  H01L24/95 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/18 ,  H01L27/016 ,  H01L2224/0557 ,  H01L2224/16145 ,  H01L2224/19 ,  H01L2224/211 ,  H01L2224/214 ,  H01L2224/224 ,  H01L2224/24155 ,  H01L2224/73209 ,  H01L2224/81815 ,  H01L2224/821 ,  H01L2224/92124 ,  H01L2225/06513 ,  H01L2225/06524

Abstract: A package comprising a first metallization portion, a first integrated device coupled to the first metallization portion through a first plurality of pillar interconnects, and a first chiplet located between the first integrated device and the first metallization portion. The first chiplet is coupled to the first integrated device through a first plurality of inter pillar interconnects. The first chiplet may include an active chiplet. The first chiplet may include a passive chiplet.