公开(公告)号：US20190221645A1

公开(公告)日：2019-07-18

申请号：US16288558

申请日：2019-02-28

Applicant: QUALCOMM Incorporated

Inventor： Ye LU ,  Junjing BAO ,  Bin YANG ,  Lixin GE ,  Yun YUE

IPC: H01L29/16 ,  H01L29/78 ,  H01L29/66 ,  H01L21/02 ,  H01L29/72 ,  H01L29/10

CPC classification number: H01L29/1606 ,  H01L21/02115 ,  H01L21/02181 ,  H01L21/02271 ,  H01L29/1004 ,  H01L29/1608 ,  H01L29/66037 ,  H01L29/66068 ,  H01L29/6656 ,  H01L29/72 ,  H01L29/785

Abstract: An integrated circuit (IC) device may include a semiconductor structure. The semiconductor structure may include a source contact, a drain contact, and a gate. A first fluorocarbon spacer may be between the gate and the source contact. A second fluorocarbon spacer may be between the gate and the drain contact.

公开(公告)号：US20190393359A1

公开(公告)日：2019-12-26

申请号：US16119914

申请日：2018-08-31

Applicant: QUALCOMM Incorporated

Inventor： Chuan-Hsing CHEN ,  Chuan-cheng CHENG ,  Yun YUE ,  Ye LU

IPC: H01L29/93 ,  H01L29/66 ,  H01L21/225

Abstract: A metal oxide semiconductor (MOS) varactor includes a first diffusion region of a first polarity and a second diffusion region of the first polarity on a semiconductor substrate. The MOS varactor further includes a channel between the first diffusion region and the second diffusion region on the semiconductor substrate. The channel has a surface dopant concentration less than 4 e1017.

公开(公告)号：US20190115342A1

公开(公告)日：2019-04-18

申请号：US15862533

申请日：2018-01-04

Applicant: QUALCOMM Incorporated

Inventor： Ye LU ,  Yun YUE

IPC: H01L27/08 ,  H01L29/94 ,  H01L29/66 ,  H01L21/822 ,  H01L21/66 ,  H01L29/06 ,  H01L27/02

Abstract: A FinMosVar (fin metal oxide semiconductor (MOS) varactor) has an improved number of fins. The number of fins are determined based on a measured or calculated gate resistance of the FinMosVar and a measured or calculated capacitance of the FinMosVar. The number of fins is less than twenty (20) fins. The FinMosVar also includes a source region, a drain region and a channel region. The drain region has a same type of doping as the source region. The channel region has the same type of doping as the source region.

公开(公告)号：US20190027554A1

公开(公告)日：2019-01-24

申请号：US15816295

申请日：2017-11-17

Applicant: QUALCOMM Incorporated

Inventor： Ye LU ,  Yun YUE ,  Phanikumar KONKAPAKA ,  Bin YANG ,  Chuan-Hsing CHEN

IPC: H01L29/06 ,  H01L23/522

Abstract: A metal-oxide-semiconductor (MOS) device for radio frequency (RF) applications may include a guard ring. The guard ring may surround the MOS device and at least one other MOS device. The MOS device may further include a level zero contact layer coupled to a first interconnect layer through level zero interconnects and vias. The first interconnect layer may be for routing to the MOS device.

公开(公告)号：US20180342585A1

公开(公告)日：2018-11-29

申请号：US15672017

申请日：2017-08-08

Applicant: QUALCOMM Incorporated

Inventor： Ye LU ,  Junjing BAO ,  Bin YANG ,  Lixin GE ,  Yun YUE

IPC: H01L29/16 ,  H01L21/02 ,  H01L29/66 ,  H01L29/10 ,  H01L29/72

CPC classification number: H01L29/1606 ,  H01L21/02115 ,  H01L21/02181 ,  H01L21/02271 ,  H01L29/1004 ,  H01L29/1608 ,  H01L29/66037 ,  H01L29/66068 ,  H01L29/6656 ,  H01L29/72 ,  H01L29/785

Abstract: An integrated circuit (IC) device may include a semiconductor structure. The semiconductor structure may include a source contact, a drain contact, and a gate. A first fluorocarbon spacer may be between the gate and the source contact. A second fluorocarbon spacer may be between the gate and the drain contact.

公开(公告)号：US20180366592A1

公开(公告)日：2018-12-20

申请号：US15686827

申请日：2017-08-25

Applicant: QUALCOMM Incorporated

Inventor： Ye LU ,  Yun YUE ,  Chuan-Hsing CHEN ,  Bin YANG ,  Lixin GE ,  Ken LIAO

IPC: H01L29/93 ,  H01L29/66 ,  H01L29/423 ,  H01L29/45

CPC classification number: H01L29/93 ,  H01L23/4824 ,  H01L23/485 ,  H01L23/66 ,  H01L29/4232 ,  H01L29/456 ,  H01L29/66174 ,  H01L29/66181

Abstract: A short-channel metal oxide semiconductor varactor may include a source region of a first polarity having a source via contact. The varactor may further include a drain region of the first polarity having a drain via contact. The varactor may further include a channel region of the first polarity between the source region and the drain region. The channel region may include a gate. The varactor may further include at least one self-aligned contact (SAC) on the gate and between the source via contact and the drain via contact.

公开(公告)号：US20180342513A1

公开(公告)日：2018-11-29

申请号：US15663602

申请日：2017-07-28

Applicant: QUALCOMM Incorporated

Inventor： Ye LU ,  Junjing BAO ,  Bin YANG ,  Lixin GE ,  Yun YUE

IPC: H01L27/092 ,  H01L29/04 ,  H01L21/78 ,  H01L29/16 ,  H01L29/423 ,  H01L29/49 ,  H01L29/06 ,  H01L21/8238

Abstract: A complementary metal-oxide-semiconductor (CMOS) transistor may include a first semiconductor structure and a gate stack on the first semiconductor structure. The gate stack may include a gate dielectric layer on the first semiconductor structure, a work function material on the gate dielectric layer, and a gate metal fill material on the work function material of the gate stack. The gate metal fill material may include a low resistivity carbon alloy. A dielectric fill material may be included on the gate stack.