公开(公告)号：US20240250188A1

公开(公告)日：2024-07-25

申请号：US18624264

申请日：2024-04-02

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Liang-Yu Su ,  Chih-Wen Yao ,  Hsiao-Chin Tuan ,  Ming-Ta Lei

IPC分类号： H01L29/93 ,  H01L27/08 ,  H01L29/06 ,  H01L29/66

CPC分类号： H01L29/93 ,  H01L27/0808 ,  H01L29/063 ,  H01L29/66174

摘要： Various embodiments of the present disclosure are directed towards an integrated chip including a first doped region in a substrate and comprising a first doping type. A gate structure is over the first doped region. A pair of contact regions are in the substrate on opposing sides of the gate structure and comprising the first doping type. The first doped region continuously laterally extends between the pair of contact regions and contacts the pair of contact regions. A second doped region is in the substrate and along a bottom of the first doped region. The second doped region comprises a second doping type opposite the first doping type.

公开(公告)号：US20240030358A1

公开(公告)日：2024-01-25

申请号：US17946048

申请日：2022-09-16

申请人： Powerchip Semiconductor Manufacturing Corporation

发明人： Shih-Ping Lee ,  Yu-Cheng Lu ,  Chia-Hao Yu ,  Yeh-Yu Chiang

IPC分类号： H01L29/92 ,  H01L29/40 ,  H01L29/66

CPC分类号： H01L29/92 ,  H01L29/401 ,  H01L29/66174

摘要： A capacitor structure including a silicon material layer, a support frame layer, and a capacitor is provided. The support frame layer is disposed in the silicon material layer. The support frame layer has recesses. There is a cavity between two adjacent recesses. The support frame layer is located between the cavity and the recess. The support frame layer has a through hole directly above the cavity. The capacitor is disposed in the silicon material layer. The capacitor includes a first insulating layer and a first electrode layer. The first insulating layer is disposed on the support frame layer. The first electrode layer is disposed on the first insulating layer and fills the recess and the cavity.

公开(公告)号：US20230282726A1

公开(公告)日：2023-09-07

申请号：US17840329

申请日：2022-06-14

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Chia-Ming HUNG ,  I-Hsuan CHIU ,  Hsiang-Fu CHEN ,  Kang-Yi LIEN ,  Chu-Heng CHEN

IPC分类号： H01L29/66 ,  H01L21/28

CPC分类号： H01L29/66174 ,  H01L29/66166 ,  H01L29/40114

摘要： A semiconductor device includes a first substrate having opposite first and second sides, a first conductive layer on the first side of the first substrate, and a second substrate having opposite first and second sides. The second side of the second substrate is bonded to the first side of the first substrate. The second substrate includes a semiconductor material, and at least one circuit element electrically coupled to the first conductive layer. The at least one circuit element includes at least one of a Schottky diode configured by the semiconductor material and a first contact structure, a capacitor having a first electrode of the semiconductor material, or a resistor of the semiconductor material.

公开(公告)号：US11721772B2

公开(公告)日：2023-08-08

申请号：US17849718

申请日：2022-06-27

申请人： United Microelectronics Corp.

发明人： Purakh Raj Verma ,  Su Xing

IPC分类号： H01L29/93 ,  H01L29/06 ,  H01L29/66

CPC分类号： H01L29/93 ,  H01L29/0688 ,  H01L29/66174

摘要： A varactor structure includes a substrate. A first and second gate structure are disposed on the substrate. The first and second gate structures each include a base portion and a plurality of line portions connected thereto. The line portions of each of the first and second gate structures is alternately arranged. A meander diffusion region is formed in the substrate and surrounds the line portions. A first set of contact plugs is planned with at least two columns or rows and disposed on the base portions of the first and second gate structures. A second set of contact plugs is planned with at least two columns or rows and disposed on the meander diffusion region. A first conductive layer is disposed on a top end of the first set of contact plugs. A second conductive layer is disposed on a top end of the second set of contact plugs.

公开(公告)号：US20180374846A1

公开(公告)日：2018-12-27

申请号：US16053211

申请日：2018-08-02

申请人： Qorvo US, Inc.

发明人： Peter V. Wright ,  Timothy S. Henderson

IPC分类号： H01L27/08 ,  H01L29/20

CPC分类号： H01L27/0808 ,  H01L25/07 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/66174 ,  H01L29/66204 ,  H01L29/93 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/00 ,  H01L2224/45099

摘要： A semiconductor device includes a first varactor diode and a second varactor diode. The second varactor diode is coupled in series with the first varactor diode and vertically disposed over the first varactor diode. By vertically disposing the second varactor diode over the first varactor diode, the space occupied by the pair of varactor diodes can be significantly reduced.

公开(公告)号：US20180233605A1

公开(公告)日：2018-08-16

申请号：US15850118

申请日：2017-12-21

申请人： QUALCOMM Incorporated

发明人： Fabio Alessio MARINO ,  Paolo MENEGOLI ,  Narasimhulu KANIKE ,  Francesco CAROBOLANTE ,  Qingqing LIANG

IPC分类号： H01L29/93 ,  H01L21/285 ,  H01L21/28 ,  H01L29/66 ,  H01L29/45 ,  H01L29/49

CPC分类号： H01L29/93 ,  H01L21/28052 ,  H01L21/28518 ,  H01L29/456 ,  H01L29/4933 ,  H01L29/66174 ,  H01L29/66189

摘要： Certain aspects of the present disclosure provide a semiconductor variable capacitor. The semiconductor variable capacitor generally includes a first non-insulative region disposed above a semiconductor region, and a second non-insulative region disposed adjacent to the semiconductor region. In certain aspects, the semiconductor variable capacitor also includes a first silicide layer disposed above the second non-insulative region, wherein the first silicide layer overlaps at least a portion of the semiconductor region. In certain aspects, a control region may be disposed adjacent to the semiconductor region such that a capacitance between the first non-insulative region and the second non-insulative region is configured to be adjusted by varying a control voltage applied to the control region.

公开(公告)号：US20180233604A1

公开(公告)日：2018-08-16

申请号：US15431623

申请日：2017-02-13

申请人： QUALCOMM Incorporated

发明人： Shiqun GU ,  Gengming TAO ,  Richard HAMMOND ,  Ranadeep DUTTA ,  Matthew Michael NOWAK ,  Francesco CAROBOLANTE

IPC分类号： H01L29/93 ,  H01L29/20 ,  H01L29/22 ,  H01L29/47 ,  H01L29/737 ,  H01L29/66 ,  H01L27/06 ,  H01L21/822 ,  H01L23/00 ,  H01L23/66 ,  H03H11/34 ,  H03H11/04

CPC分类号： H01L29/93 ,  H01L21/8221 ,  H01L23/66 ,  H01L24/13 ,  H01L27/0629 ,  H01L27/0688 ,  H01L29/20 ,  H01L29/22 ,  H01L29/47 ,  H01L29/66174 ,  H01L29/66242 ,  H01L29/7371 ,  H01L2224/13025 ,  H03H11/04 ,  H03H11/342

摘要： A tunable capacitor may include a first terminal having a first semiconductor component with a first polarity. The tunable capacitor may also include a second terminal having a second semiconductor component with a second polarity. The second component may be adjacent to the first semiconductor component. The tunable capacitor may further include a first conductive material electrically coupled to a first depletion region at a first sidewall of the first semiconductor component.

公开(公告)号：US09947701B2

公开(公告)日：2018-04-17

申请号：US15428356

申请日：2017-02-09

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Victor Chiang Liang ,  Fu-Huan Tsai ,  Fang-Ting Kuo ,  Meng-Chang Ho ,  Yu-Lin Wei ,  Chi-Feng Huang

IPC分类号： H01L27/108 ,  H01L27/146 ,  H01L27/07 ,  H01L29/93

CPC分类号： H01L27/14603 ,  H01L27/0733 ,  H01L27/14614 ,  H01L27/1463 ,  H01L27/14689 ,  H01L29/66174 ,  H01L29/93

摘要： A low noise device includes an isolation feature in a substrate. The low noise device further includes a gate stack over a channel in the substrate. The gate stack includes a gate dielectric layer extending over a portion of the isolation feature, and a gate electrode over the gate dielectric layer. The low noise device further includes a charge trapping reducing structure adjacent to the isolation feature. The charge trapping reducing structure is configured to reduce a number of charge carriers adjacent an interface between the isolation feature and the channel.

公开(公告)号：US09882066B1

公开(公告)日：2018-01-30

申请号：US15429252

申请日：2017-02-10

申请人： QUALCOMM Incorporated

发明人： Fabio Alessio Marino ,  Paolo Menegoli ,  Narasimhulu Kanike ,  Francesco Carobolante ,  Qingqing Liang

IPC分类号： H01L29/93 ,  H01L29/45 ,  H01L29/49 ,  H01L21/285 ,  H01L21/28 ,  H01L29/66

CPC分类号： H01L29/93 ,  H01L21/28052 ,  H01L21/28518 ,  H01L29/456 ,  H01L29/4933 ,  H01L29/66174 ,  H01L29/66189

摘要： Certain aspects of the present disclosure provide a semiconductor variable capacitor. The semiconductor variable capacitor generally includes a first non-insulative region disposed above a semiconductor region, and a second non-insulative region disposed adjacent to the semiconductor region. In certain aspects, the semiconductor variable capacitor also includes a first silicide layer disposed above the second non-insulative region, wherein the first silicide layer overlaps at least a portion of the semiconductor region. In certain aspects, a control region may be disposed adjacent to the semiconductor region such that a capacitance between the first non-insulative region and the second non-insulative region is configured to be adjusted by varying a control voltage applied to the control region.

公开(公告)号：US09829507B2

公开(公告)日：2017-11-28

申请号：US15045952

申请日：2016-02-17

申请人： RENESAS ELECTRONICS CORPORATION

发明人： Takashi Saito

IPC分类号： G01R31/302 ,  G01R1/067 ,  G01R1/073 ,  G01R27/08 ,  G01R31/28 ,  H01L29/66 ,  H01L29/93

CPC分类号： G01R1/0675 ,  G01R1/07342 ,  G01R27/08 ,  G01R31/2889 ,  H01L29/66174 ,  H01L29/93

摘要： Reliability of an electrical test of a semiconductor wafer is improved. A method of manufacturing a semiconductor device includes a step of performing an electrical test of a semiconductor element by allowing contact portions (tips) of a force terminal (contact terminal) and a sense terminal (contact terminal) held by a probe card (first card) to come into contact with an electrode terminal of a semiconductor wafer. In the step of performing the electrical test, the contact portions of the force terminal and the sense terminal move in a direction away from each other after coming into contact with the first electrode terminal.