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公开(公告)号：US20130283277A1
公开(公告)日：2013-10-24
申请号：US13453904
申请日：2012-04-23
IPC分类号： G06F9/46
CPC分类号： G06F9/5094 , G06F1/329 , Y02D10/22 , Y02D10/24
摘要： A method and system to selectively move one or more of a plurality threads which are executing in parallel by a plurality of processing cores. In one embodiment, a thread may be moved from executing in one of the plurality of processing cores to executing in another of the plurality of processing cores, the moving based on a performance characteristic associated with the plurality of threads. In another embodiment of the invention, a power state of the plurality of processing cores may be changed to improve a power efficiency associated with the executing of the multiple threads.
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2.发明授权Thread migration to improve power efficiency in a parallel processing environment 有权线程迁移以提高并行处理环境中的功率效率公开(公告)号：US08166323B2
公开(公告)日：2012-04-24
申请号：US13089049
申请日：2011-04-18
IPC分类号： G06F1/32
CPC分类号： G06F1/3203 , G06F1/324 , G06F1/329 , G06F1/3296 , G06F9/4893 , Y02D10/126 , Y02D10/172 , Y02D10/24
摘要： A method and system to selectively move one or more of a plurality threads which are executing in parallel by a plurality of processing cores. In one embodiment, a thread may be moved from executing in one of the plurality of processing cores to executing in another of the plurality of processing cores, the moving based on a performance characteristic associated with the plurality of threads. In another embodiment of the invention, a power state of the plurality of processing cores may be changed to improve a power efficiency associated with the executing of the multiple threads.
摘要翻译： 一种选择性地移动由多个处理核并行执行的多个线程中的一个或多个的方法和系统。 在一个实施例中，可以将线程从执行多个处理核心中的一个移动到在多个处理核心中的另一个处理核心中执行，基于与多个线程相关联的性能特性来移动线程。 在本发明的另一实施例中，可以改变多个处理核心的功率状态，以提高与执行多个线程相关联的功率效率。
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3.发明申请THREAD MIGRATION TO IMPROVE POWER EFFICIENCY IN A PARALLEL PROCESSING ENVIRONMENT 有权螺旋式移动以提高平行处理环境中的功率效率公开(公告)号：US20110197195A1
公开(公告)日：2011-08-11
申请号：US13089049
申请日：2011-04-18
IPC分类号： G06F9/46
CPC分类号： G06F1/3203 , G06F1/324 , G06F1/329 , G06F1/3296 , G06F9/4893 , Y02D10/126 , Y02D10/172 , Y02D10/24
摘要： A method and system to selectively move one or more of a plurality threads which are executing in parallel by a plurality of processing cores. In one embodiment, a thread may be moved from executing in one of the plurality of processing cores to executing in another of the plurality of processing cores, the moving based on a performance characteristic associated with the plurality of threads. In another embodiment of the invention, a power state of the plurality of processing cores may be changed to improve a power efficiency associated with the executing of the multiple threads.
摘要翻译： 一种选择性地移动由多个处理核并行执行的多个线程中的一个或多个的方法和系统。 在一个实施例中，可以将线程从执行多个处理核心中的一个移动到在多个处理核心中的另一个处理核心中执行，基于与多个线程相关联的性能特性来移动线程。 在本发明的另一实施例中，可以改变多个处理核心的功率状态，以提高与执行多个线程相关联的功率效率。
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4.发明授权Thread migration to improve power efficiency in a parallel processing environment 有权线程迁移以提高并行处理环境中的功率效率公开(公告)号：US07930574B2
公开(公告)日：2011-04-19
申请号：US11968060
申请日：2007-12-31
IPC分类号： G06F1/32
CPC分类号： G06F1/3203 , G06F1/324 , G06F1/329 , G06F1/3296 , G06F9/4893 , Y02D10/126 , Y02D10/172 , Y02D10/24
摘要： A method and system to selectively move one or more of a plurality threads which are executing in parallel by a plurality of processing cores. In one embodiment, a thread may be moved from executing in one of the plurality of processing cores to executing in another of the plurality of processing cores, the moving based on a performance characteristic associated with the plurality of threads. In another embodiment of the invention, a power state of the plurality of processing cores may be changed to improve a power efficiency associated with the executing of the multiple threads.
摘要翻译： 一种选择性地移动由多个处理核并行执行的多个线程中的一个或多个的方法和系统。 在一个实施例中，可以将线程从执行多个处理核心中的一个移动到在多个处理核心中的另一个处理核心中执行，基于与多个线程相关联的性能特性来移动线程。 在本发明的另一实施例中，可以改变多个处理核心的功率状态，以提高与执行多个线程相关联的功率效率。
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5.发明授权Thread migration to improve power efficiency in a parallel processing environment 有权线程迁移以提高并行处理环境中的功率效率公开(公告)号：US08806491B2
公开(公告)日：2014-08-12
申请号：US13453904
申请日：2012-04-23
CPC分类号： G06F9/5094 , G06F1/329 , Y02D10/22 , Y02D10/24
摘要： A method and system to selectively move one or more of a plurality threads which are executing in parallel by a plurality of processing cores. In one embodiment, a thread may be moved from executing in one of the plurality of processing cores to executing in another of the plurality of processing cores, the moving based on a performance characteristic associated with the plurality of threads. In another embodiment of the invention, a power state of the plurality of processing cores may be changed to improve a power efficiency associated with the executing of the multiple threads.
摘要翻译： 一种选择性地移动由多个处理核并行执行的多个线程中的一个或多个的方法和系统。 在一个实施例中，可以将线程从执行多个处理核心中的一个移动到在多个处理核心中的另一个处理核心中执行，基于与多个线程相关联的性能特性来移动线程。 在本发明的另一实施例中，可以改变多个处理核心的功率状态，以提高与执行多个线程相关联的功率效率。
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6.发明申请THREAD MIGRATION TO IMPROVE POWER EFFICIENCY IN A PARALLEL PROCESSING ENVIRONMENT 有权螺旋式移动以提高平行处理环境中的功率效率公开(公告)号：US20090172424A1
公开(公告)日：2009-07-02
申请号：US11968060
申请日：2007-12-31
CPC分类号： G06F1/3203 , G06F1/324 , G06F1/329 , G06F1/3296 , G06F9/4893 , Y02D10/126 , Y02D10/172 , Y02D10/24
摘要： A method and system to selectively move one or more of a plurality threads which are executing in parallel by a plurality of processing cores. In one embodiment, a thread may be moved from executing in one of the plurality of processing cores to executing in another of the plurality of processing cores, the moving based on a performance characteristic associated with the plurality of threads. In another embodiment of the invention, a power state of the plurality of processing cores may be changed to improve a power efficiency associated with the executing of the multiple threads.
摘要翻译： 一种选择性地移动由多个处理核并行执行的多个线程中的一个或多个的方法和系统。 在一个实施例中，可以将线程从执行多个处理核心中的一个移动到在多个处理核心中的另一个处理核心中执行，基于与多个线程相关联的性能特性来移动线程。 在本发明的另一实施例中，可以改变多个处理核心的功率状态，以提高与执行多个线程相关联的功率效率。
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公开(公告)号：US07434073B2
公开(公告)日：2008-10-07
申请号：US10999786
申请日：2004-11-29
IPC分类号： G06F1/26
CPC分类号： G06F1/06 , G06F1/3203 , G06F1/324 , G06F1/3296 , G06F9/3869 , Y02D10/126 , Y02D10/172
摘要： A method and apparatus for scaling frequency and operating voltage of at least one clock domain of a microprocessor. More particularly, embodiments of the invention relate to techniques to divide a microprocessor into clock domains and control the frequency and operating voltage of each clock domain independently of the others.
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公开(公告)号：US08407497B2
公开(公告)日：2013-03-26
申请号：US12214724
申请日：2008-06-20
CPC分类号： G06F1/06 , G06F1/3203 , G06F1/324 , G06F1/3296 , G06F9/3869 , Y02D10/126 , Y02D10/172
摘要： A method and apparatus for scaling frequency and operating voltage of at least one clock domain of a microprocessor. More particularly, embodiments of the invention relate to techniques to divide a microprocessor into clock domains and control the frequency and operating voltage of each clock domain independently of the others.
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公开(公告)号：US20080244278A1
公开(公告)日：2008-10-02
申请号：US10594827
申请日：2006-06-30
CPC分类号： G01R31/025
摘要： Methods and apparatus to provide leakage power estimation are described. In one embodiment, one or more sensed temperature values (108) and one or more voltage values (110) are utilized to determine the leakage power of an integrated circuit (IC) component. Other embodiments are also described.
摘要翻译： 描述提供泄漏功率估计的方法和装置。 在一个实施例中，利用一个或多个感测温度值（108）和一个或多个电压值（110）来确定集成电路（IC）组件的泄漏功率。 还描述了其它实施例。
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公开(公告)号：US07814339B2
公开(公告)日：2010-10-12
申请号：US10594827
申请日：2006-06-30
CPC分类号： G01R31/025
摘要： Methods and apparatus to provide leakage power estimation are described. In one embodiment, one or more sensed temperature values (108) and one or more voltage values (110) are utilized to determine the leakage power of an integrated circuit (IC) component. Other embodiments are also described.
摘要翻译： 描述提供泄漏功率估计的方法和装置。 在一个实施例中，利用一个或多个感测温度值（108）和一个或多个电压值（110）来确定集成电路（IC）组件的泄漏功率。 还描述了其它实施例。
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