摘要:
Apparatus and a method is disclosed for treating particulate materials (e.g., plastic resins) so as change the surface characteristics of the particulate materials comprising a work chamber receiving a quantity of the particulate material to be treated, a power supply, and a capacitor energized by the power supply, where the capacitor generates a capacitive plasma which is used to treat the particulate material such that when objects are formed from the treated particulate material, such objects will have enhanced surface characteristics. Further, a quantity of a gas may be introduced within the work chamber to facilitate the generation of a plasma within the particulate material.
摘要:
Packaged NERS-active structures are disclosed that include a NERS substrate having a NERS-active structure thereon, and a packaging substrate over the NERS substrate having an opening therethrough, the opening in alignment with the NERS-active structure. A membrane may cover the opening in the packaging substrate. In order to perform nanoenhanced Raman spectroscopy, the membrane may be removed, and an analyte placed on the NERS substrate adjacent the NERS-active structure. The membrane may be replaced with another membrane after the analyte has been placed on the substrate. The membrane may maintain the pristine state of the substrate before it is deployed, and the replacement membrane may preserve the substrate and analyte for archival purposes. Also disclosed are methods for performing NERS with packaged NERS-active structures.
摘要:
Embodiments of the present invention are directed to mixed-scale electronic interfaces, included in integrated circuits and other electronic devices, that provide for dense electrical interconnection between microscale features of a predominantly microscale or submicroscale layer and nanoscale features of a predominantly nanoscale layer. The predominantly nanoscale layer, in one embodiment of the present invention, comprises a tessellated pattern of submicroscale or microscale pads densely interconnected by nanowire junctions between sets of parallel, closely spaced nanowire bundles. The predominantly submicroscale or microscale layer includes pins positioned complementarily to the submicroscale or microscale pads in the predominantly nanoscale layer. Pins can be configured according to any periodic tiling of the microscale layer.
摘要:
A system for performing nanostructure-enhanced Raman spectroscopy (NERS) includes a radiation source, a radiation detector configured to detect Raman scattered radiation scattered by an analyte, and a container configured to provide a sealed enclosure. The NERS system further includes a turbulence generating device configured to generate random dynamic motion of a plurality of nanoparticles within the container. A method for performing NERS includes providing a container configured to provide a sealed enclosure, providing a plurality of nanoparticles each comprising a NERS-active material and an analyte within the container, causing random dynamic motion of the plurality of nanoparticles and the analyte, irradiating the plurality of nanoparticles and the analyte with radiation, and detecting Raman scattered radiation scattered by the analyte.
摘要:
An imprinting apparatus and method of fabrication provide a mold having a pattern for imprinting. The apparatus includes a semiconductor substrate polished in a [110] direction. The semiconductor substrate has a (110) horizontal planar surface and vertical sidewalls of a wet chemical etched trench. The sidewalls are aligned with and therefore are (111) vertical lattice planes of the semiconductor substrate. The semiconductor substrate includes a plurality of vertical structures between the sidewalls, wherein the vertical structures may be nano-scale spaced apart. The method includes wet etching a trench with spaced apart (111) vertical sidewalls in an exposed portion of the (110) horizontal surface of the semiconductor substrate along (111) vertical lattice planes. A chemical etching solution is used that etches the (111) vertical lattice planes slower than the (110) horizontal lattice plane. The method further includes forming the imprinting mold.
摘要:
Various embodiments of the present invention include three-dimensional, at least partially nanoscale, electronic circuits and devices in which signals can be routed in three independent directions, and in which electronic components can be fabricated at junctions interconnected by internal signal lines. The three-dimensional, at least partially nanoscale, electronic circuits and devices include layers, the nanowire or microscale-or-submicroscale/nanowire junctions of each of which may be economically and efficiently fabricated as one type of electronic component. Various embodiments of the present invention include nanoscale memories, nanoscale programmable arrays, nanoscale multiplexers and demultiplexers, and an almost limitless number of specialized nanoscale circuits and nanoscale electronic components.
摘要:
A switching device includes at least one bottom electrode and at least one top electrode. The top electrode crosses the bottom electrode at a non-zero angle, thereby forming a junction. A metal oxide layer is established on at least one of the bottom electrode or the top electrode. A molecular layer including a monolayer of organic molecules and a source of water molecules is established in the junction. Upon introduction of a forward bias, the molecular layer facilitates a redox reaction between the electrodes, thereby reducing a tunneling gap between the electrodes.
摘要:
Embodiments of the present invention are directed to mixed-scale electronic interfaces, included in integrated circuits and other electronic devices, that provide for dense electrical interconnection between microscale features of a predominantly microscale or submicroscale layer and nanoscale features of a predominantly nanoscale layer. The predominantly nanoscale layer, in one embodiment of the present invention, comprises a tessellated pattern of submicroscale or microscale pads densely interconnected by nanowire junctions between sets of parallel, closely spaced nanowire bundles. The predominantly submicroscale or microscale layer includes pins positioned complementarily to the submicroscale or microscale pads in the predominantly nanoscale layer.
摘要:
A sensor includes traps that are adjacent to a waveguide and capable of holding a contaminant for an interaction with an evanescent field surrounding the waveguide. When held in a trap, a particle of the contaminant, which may be an atom, a molecule, a virus, or a microbe, scatters light from the waveguide, and the scattered light can be measured to detect the presence or concentration of the contaminant. Holding of the particles permits sensing of the contaminant in a gas where movement of the particles might otherwise be too fast to permit measurement of the interaction with the evanescent field. The waveguide, a lighting system for the waveguide, a photosensor, and a communications interface can all be fabricated on a semiconductor die to permit fabrication of an autonomous nanosensor capable of suspension in the air or a gas being sensed.
摘要:
Various embodiments of the present invention include methods for determining nanowire addressing schemes and include microscale/nanoscale electronic devices that incorporate the nanowire addressing schemes for reliably addressing nanowire-junctions within nanowire crossbars. The addressing schemes allow for change in the resistance state, or other physical or electronic state, of a selected nanowire-crossbar junction without changing the resistance state, or other physical or electronic state, of the remaining nanowire-crossbar junctions, and without destruction of either the selected nanowire-crossbar junction or the remaining, non-selected nanowire-crossbar junctions. Additional embodiments of the present invention include nanoscale memory arrays and other nanoscale electronic devices that incorporate the nanowire-addressing-scheme embodiments of the present invention. Certain of the embodiments of the present invention employ constant-weight codes, a well-known class of error-control-encoding codes, as addressed-nanowire selection voltages applied to microscale output signal lines of microscale/nanoscale encoder-demultiplexers that are selectively interconnected with a set of nanowires.