公开(公告)号：US20150178243A1

公开(公告)日：2015-06-25

申请号：US14539740

申请日：2014-11-12

Applicant: Rambus Inc.

Inventor： Keith LOWERY ,  Vlad FRUCHTER

IPC: G06F15/173 ,  H04L29/08

CPC classification number: G06F15/17331 ,  G06F3/0619 ,  G06F12/0653 ,  G06F12/0692 ,  G06F13/16 ,  H04L67/1097 ,  H04L67/2842

Abstract: A method of processing memory instructions including receiving a memory related command from a client system in communication with a memory appliance via a communication protocol, wherein the memory appliance comprises a processor, a memory unit controller and a plurality of memory devices coupled to said memory unit controller. The memory related command is translated by the processor into a plurality of commands that are formatted to perform prescribed data manipulation operations on data of the plurality of memory devices stored in data structures. The plurality of primitive commands is executed on data stored in the memory devices to produce a result, wherein the executing is performed by the memory unit controller. A direct memory transfer of the result is established over the communication protocol to a network.

Abstract translation: 一种处理存储器指令的方法，包括经由通信协议从与存储设备通信的客户端系统接收与存储器有关的命令，其中所述存储设备包括处理器，存储器单元控制器和耦合到所述存储器单元的多个存储器设备 控制器。 存储器相关命令由处理器转换成多个命令，其被格式化为对存储在数据结构中的多个存储器件的数据执行规定的数据操作操作。 对存储在存储器装置中的数据执行多个原语命令以产生结果，其中执行由存储器单元控制器执行。 通过通信协议建立对网络的直接存储器传输。

公开(公告)号：US20210011768A1

公开(公告)日：2021-01-14

申请号：US16947191

申请日：2020-07-22

Applicant: Rambus Inc.

Inventor： Keith LOWERY

IPC: G06F9/50 ,  G06F8/41 ,  G06F9/30 ,  G06F9/38 ,  G06F12/02

Abstract: A method and system for thread aware, class aware, and topology aware memory allocations. Embodiments include a compiler configured to generate compiled code (e.g., for a runtime) that when executed allocates memory on a per class per thread basis that is system topology (e.g., for non-uniform memory architecture (NUMA)) aware. Embodiments can further include an executable configured to allocate a respective memory pool during runtime for each instance of a class for each thread. The memory pools are local to a respective processor, core, etc., where each thread executes.

公开(公告)号：US20180203734A1

公开(公告)日：2018-07-19

申请号：US15743635

申请日：2016-07-05

Applicant: RAMBUS, INC.

Inventor： Keith LOWERY

IPC: G06F9/50 ,  G06F9/30 ,  G06F9/38 ,  G06F12/02

CPC classification number: G06F9/5016 ,  G06F8/453 ,  G06F9/3004 ,  G06F9/3889 ,  G06F9/50 ,  G06F12/023 ,  G06F2209/502 ,  G06F2212/2542 ,  Y02D10/22

Abstract: A method and system for thread aware, class aware, and topology aware memory allocations. Embodiments include a compiler configured to generate compiled code (e.g., for a runtime) that when executed allocates memory on a per class per thread basis that is system topology (e.g., for non-uniform memory architecture (NUMA)) aware. Embodiments can further include an executable configured to allocate a respective memory pool during runtime for each instance of a class for each thread. The memory pools are local to a respective processor, core, etc., where each thread executes.

公开(公告)号：US20240220442A1

公开(公告)日：2024-07-04

申请号：US18513053

申请日：2023-11-17

Applicant: Rambus Inc.

Inventor： Keith LOWERY ,  Vlad FRUCHTER

IPC: G06F15/173 ,  G06F3/06 ,  G06F12/06 ,  G06F13/16 ,  H04L67/1097 ,  H04L67/568

CPC classification number: G06F15/17331 ,  G06F3/0619 ,  G06F12/0653 ,  G06F12/0692 ,  G06F13/16 ,  H04L67/1097 ,  H04L67/568

Abstract: A method of processing memory instructions including receiving a memory related command from a client system in communication with a memory appliance via a communication protocol, wherein the memory appliance comprises a processor, a memory unit controller and a plurality of memory devices coupled to said memory unit controller. The memory related command is translated by the memory appliance into a plurality of primitive commands that are lower level commands and formatted to perform prescribed data manipulation operations on data of the plurality of memory devices stored in data structures. The plurality of primitive commands is executed on data stored in the memory devices to produce a result, wherein the executing is performed by the memory controller. A direct memory transfer of the result is established over the communication protocol to a network.

公开(公告)号：US20220100697A1

公开(公告)日：2022-03-31

申请号：US17483641

申请日：2021-09-23

Applicant: Rambus Inc.

Inventor： Keith LOWERY ,  Vlad FRUCHTER

IPC: G06F15/173 ,  G06F12/06 ,  G06F3/06 ,  G06F13/16

Abstract: A method of processing memory instructions including receiving a memory related command from a client system in communication with a memory appliance via a communication protocol, wherein the memory appliance comprises a processor, a memory unit controller and a plurality of memory devices coupled to said memory unit controller. The memory related command is translated by the processor into a plurality of commands that are formatted to perform prescribed data manipulation operations on data of the plurality of memory devices stored in data structures. The plurality of primitive commands is executed on data stored in the memory devices to produce a result, wherein the executing is performed by the memory unit controller. A direct memory transfer of the result is established over the communication protocol to a network.

公开(公告)号：US20160301742A1

公开(公告)日：2016-10-13

申请号：US15080371

申请日：2016-03-24

Applicant: Rambus Inc.

Inventor： Keith LOWERY

IPC: H04L29/08 ,  H04L12/24

CPC classification number: H04L67/10 ,  G06F3/067 ,  G06F9/5072 ,  H04L67/1097

Abstract: Methods and systems for managing data storage and compute resources. The data can be stored a multiple locations allowing compute operations to be performed in a distributed manner in one or more locations. The cloud storage and cloud compute resources can be dynamically scaled based on the locations of the data and based on the cloud storage and/or cloud computing budgets. Dynamic reconfiguration of reconfigurable processors (e.g., FPGA) can further be used to accelerate compute operations.

Abstract translation: 用于管理数据存储和计算资源的方法和系统。 可以将数据存储在多个位置，允许在一个或多个位置以分布式方式执行计算操作。 云存储和云计算资源可以基于数据的位置并基于云存储和/或云计算预算进行动态扩展。 可重新配置处理器（例如，FPGA）的动态重新配置可进一步用于加速计算操作。

公开(公告)号：US20160299856A1

公开(公告)日：2016-10-13

申请号：US15096111

申请日：2016-04-11

Applicant: Rambus Inc.

Inventor： Vlad FRUCHTER ,  Keith LOWERY ,  Michael UHLER ,  Steven WOO ,  Chi-Ming (Philip) YEUNG ,  Ronald LEE

IPC: G06F13/16 ,  G06F13/42 ,  G06F13/40

Abstract: System and method for improved transferring of data involving memory device systems.

Abstract translation: 用于改进涉及存储器件系统的数据传输的系统和方法。

公开(公告)号：US20150178002A1

公开(公告)日：2015-06-25

申请号：US14539641

申请日：2014-11-12

Applicant: Rambus Inc.

Inventor： Keith LOWERY ,  Vlad FRUCHTER ,  Chi-Ming YEUNG

IPC: G06F3/06

CPC classification number: G06F15/17331 ,  G06F3/0619 ,  G06F12/0653 ,  G06F12/0692 ,  G06F13/16 ,  H04L67/1097 ,  H04L67/2842

Abstract: A memory appliance system is described and includes a processor coupled to one or more communication channels with a command interface, wherein the processor is configured for communicating commands over the communication channels. A plurality of Smart Memory Cubes (SMCs) is coupled to the processor through the communication channels. Each of the SMCs includes a controller that is programmable, and a plurality of memory devices. The controller is configured to respond to commands from the command interface to access content stored in one or more of the plurality of memory devices and to perform data operations on content accessed from the plurality of memory devices.

Abstract translation: 描述了存储器装置系统，并且包括利用命令接口耦合到一个或多个通信信道的处理器，其中处理器被配置用于在通信信道上传送命令。 多个智能存储立方体（SMC）通过通信信道耦合到处理器。 每个SMC包括可编程的控制器和多个存储器件。 控制器被配置为响应来自命令界面的命令来访问存储在多个存储器设备中的一个或多个中的内容，并且对从多个存储器设备访问的内容执行数据操作。