公开(公告)号：US20180205389A1

公开(公告)日：2018-07-19

申请号：US15711776

申请日：2017-09-21

Applicant: REALTEK SEMICONDUCTOR CORPORATION

Inventor： CHIH-LUNG CHEN ,  CHI-YING LEE ,  KUO-SHENG CHUNG ,  SHIH-HSIUNG HUANG

IPC: H03M1/16 ,  H03M1/74

CPC classification number: H03M1/167 ,  H03M1/0695 ,  H03M1/361 ,  H03M1/74 ,  H03M1/804

Abstract: A pipelined analog-to-digital converter (ADC) and an operating method are provided. The pipelined ADC includes a multiplying digital-to-analog converter (MDAC) and a sub-ADC. The MDAC alternatively operates in an amplifying phase and a sampling phase according to two non-overlapping clocks, and performs operations on an input signal in the amplifying phase according to a target voltage determined by a digital code. The sub ADC includes multiple comparators, a determination circuit, and an encoding circuit. The comparators generate multiple comparison results by comparing the input signal with multiple predetermined voltages. The determination circuit generates multiple comparison completion signals in a non-overlapping interval of the two clocks according to the comparison results. The comparison completion signals respectively indicate whether the comparators complete the comparison. The encoding circuit determines the digital code according to the comparison results and the comparison completion signals.