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    Semiconductor device, electronic device and sensing method
    2.
    发明授权
    Semiconductor device, electronic device and sensing method 有权
    半导体器件，电子器件和感测方法

    公开(公告)号：US09344101B2

    公开(公告)日：2016-05-17

    申请号：US14830623

    申请日：2015-08-19

    Applicant: RENESAS ELECTRONICS CORPORATION

    Inventor： Hiroshi Ueki

    IPC: H03M1/12 ,  H03M1/00

    CPC classification number: H03M1/002 ,  H03M1/12 ,  H03M1/142

    Abstract: In order to reduce power consumption, a semiconductor device includes an RTC for generating a piece of time information and a first activation signal SW3, a comparator for determining whether the value of an analog input signal exists within a predetermined range, an AD conversion circuit for converting the analog input signal to a digital signal in response to a common activation signal, and a CPU for processing the digital signal in response to the common activation signal. When the analog input signal does not exist within the predetermined rang, the comparator generates the common activation signal. Then, the CPU stores the piece of digital information corresponding to the digital signal as well as the piece of time information from the RTC into a storage circuit.

    Abstract translation: 为了降低功耗，半导体器件包括用于产生一段时间信息的RTC和第一激活信号SW3，用于确定模拟输入信号的值是否存在于预定范围内的比较器，用于 响应于公共激活信号将模拟输入信号转换为数字信号，以及CPU，用于响应于公共激活信号来处理数字信号。 当模拟输入信号不在预定范围内时，比较器产生公共激活信号。 然后，CPU将与数字信号相对应的数字信息以及来自RTC的时间信息存储到存储电路中。

    Semiconductor device and control method thereof
    3.
    发明授权
    Semiconductor device and control method thereof 有权

    公开(公告)号：US10268576B2

    公开(公告)日：2019-04-23

    申请号：US15914875

    申请日：2018-03-07

    Applicant: Renesas Electronics Corporation

    Inventor： Hiroshi Ueki ,  Eiji Koeta

    IPC: G06F11/14 ,  G06F12/02 ,  G11C16/16 ,  H01L27/11521 ,  G11C29/02 ,  H01L27/11531 ,  G11C16/34

    Abstract: An object of the present invention is to provide a semiconductor device and a control method thereof that can suppress a circuit scale from being increased while maintaining a high interruption response performance.According to an embodiment, a semiconductor device includes a flash memory in which N interruption subroutine programs are stored, an interruption control circuit that detects occurrence of an interruption, counters that determine the respective occurrence probabilities of N interruption factors on the basis of the detection result of the interruption control circuit, an interruption buffer memory in which the M (M

    Correlation operation circuit and semiconductor device
    4.
    发明授权
    Correlation operation circuit and semiconductor device 有权

    公开(公告)号：US10152456B2

    公开(公告)日：2018-12-11

    申请号：US15582865

    申请日：2017-05-01

    Applicant: Renesas Electronics Corporation

    Inventor： Hiroshi Ueki

    IPC: G06F17/15 ,  G06F7/544 ,  G06F13/42 ,  G11C11/419

    Abstract: A correlation operation circuit includes a first SRAM storing a plurality of pieces of detection pattern data, product-sum operators, a second SRAM storing intermediate data, and a comparator. When time series data is sequentially input, the intermediate data of all correlation functions referring to one time series data in a period during which the one time series data is input. When one time series data is input, the product-sum operator multiplies the detection pattern data sequentially read from the first SRAM by the one input time series data. The corresponding intermediate data is read from the second SRAM in synchronization with the multiplication, and the sequentially-calculated products are cumulatively added to the read intermediate data to be written back into the second SRAM as the intermediate data. As a result, the calculated correlation function data is supplied to the comparator to be compared with a predetermined specified value.

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